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Publications (10 of 98) Show all publications
Zhang, Z. (2019). A novel gate junction design for low noise Si Nanowire ISFET Sensor application. In: : . Paper presented at China Semiconductor Technology International Conference (CSTIC).
Open this publication in new window or tab >>A novel gate junction design for low noise Si Nanowire ISFET Sensor application
2019 (English)Conference paper, Oral presentation with published abstract (Other academic)
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:uu:diva-390142 (URN)
Conference
China Semiconductor Technology International Conference (CSTIC)
Available from: 2019-08-05 Created: 2019-08-05 Last updated: 2019-08-05
Wen, C., Li, S., Zeng, S., Zhang, Z. & Zhang, S.-L. (2019). Autogenic analyte translocation in nanopores. Nano Energy, 60, 503-509
Open this publication in new window or tab >>Autogenic analyte translocation in nanopores
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2019 (English)In: Nano Energy, ISSN 2211-2855, E-ISSN 2211-3282, Vol. 60, p. 503-509Article in journal (Refereed) Published
Abstract [en]

Nanopores have been widely studied for power generation and single-molecule detection. Although the power level generated by a single nanopore based on electrolyte concentration gradient is too low to be practically useful, such a power level is found sufficient to drive analyte translocation in nanopores. Here, we explore the simultaneous action of a solid-state nanopore as a nanopower generator and a nanoscale biosensor by exploiting the extremely small power generated to drive the analyte translocation in the same nanopore device. This autogenic analyte translocation is demonstrated using protein and DNA for their distinct shape, size and charge. The simple device structure allows for easy implementation of either electrical or optical readout. The obtained nanopore translocation is characterized by typical behaviors expected for an ordinary nanopore sensor powered by an external source. Extensive numerical simulation confirms the power generation and power level generated. It also reveals the fundamentals of autogenic translocation. As it requires no external power source, the sensing can be conducted with simple readout electronics and may allow for integration of high-density nanopores. Our approach demonstrated in this work may pave the way to practical high-throughput single-molecule nanopore sensing powered by the distributed energy harvested by the nanopores themselves.

Place, publisher, year, edition, pages
Elsevier, 2019
National Category
Nano Technology
Identifiers
urn:nbn:se:uu:diva-384648 (URN)10.1016/j.nanoen.2019.03.092 (DOI)000467774100056 ()
Funder
Swedish Research Council, 621-2014-6300Stiftelsen Olle Engkvist Byggmästare, 2016/39
Available from: 2019-06-07 Created: 2019-06-07 Last updated: 2019-06-19Bibliographically approved
Chen, X., Chen, S., Hu, Q., Zhang, S.-L., Solomon, P. & Zhang, Z. (2019). Device noise reduction for Silicon nanowire field-effect-transistor based sensors by using a Schottky junction gate. ACS sensors, 4(2), 427-433
Open this publication in new window or tab >>Device noise reduction for Silicon nanowire field-effect-transistor based sensors by using a Schottky junction gate
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2019 (English)In: ACS sensors, ISSN 2379-3694, Vol. 4, no 2, p. 427-433Article in journal (Refereed) Published
Abstract [en]

The sensitivity of metal-oxide-semiconductor field-effect transistor (MOSFET) based nanoscale sensors is ultimately limited by noise induced by carrier trapping/detrapping processes at the gate oxide/semiconductor interfaces. We have designed a Schottky junction gated silicon nanowire field-effect transistor (SiNW-SJGFET) sensor, where the Schottky junction replaces the noisy oxide/semiconductor interface. Our sensor exhibits significantly reduced noise, 2.1×10-9 V2µm2/Hz at 1 Hz, compared to reference devices with the oxide/semiconductor interface operated at both inversion and depletion modes. Further improvement can be anticipated by wrapping the nanowire by such a Schottky junction thereby eliminating all oxide/semiconductor interfaces. Hence, a combination of the low-noise SiNW-SJGFET sensor device with a sensing surface of the Nernstian response limit holds promises for future high signal-to-noise ratio sensor applications.

Keywords
Noise reduction, schottky junction gate, silicon nanowire, field-effect transistor, low frequency noise, ion sensor
National Category
Nano Technology Signal Processing
Identifiers
urn:nbn:se:uu:diva-374776 (URN)10.1021/acssensors.8b0139 (DOI)000459836400021 ()30632733 (PubMedID)
Funder
Swedish Foundation for Strategic Research , SSF ICA 12-0047Swedish Foundation for Strategic Research , FFL15-0174Swedish Research Council, VR 2014-5588Knut and Alice Wallenberg Foundation
Available from: 2019-01-24 Created: 2019-01-24 Last updated: 2019-04-03Bibliographically approved
Chen, X., Chen, S., Zhang, S.-L., Solomon, P. & Zhang, Z. (2019). Low Noise Schottky Junction Tri-gate Silicon Nanowire Field-effect Transistor for Charge Sensing. IEEE Transactions on Electron Devices, 66(9)
Open this publication in new window or tab >>Low Noise Schottky Junction Tri-gate Silicon Nanowire Field-effect Transistor for Charge Sensing
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2019 (English)In: IEEE Transactions on Electron Devices, ISSN 0018-9383, E-ISSN 1557-9646, Vol. 66, no 9Article in journal (Refereed) Published
Abstract [en]

Silicon nanowire (SiNW) field-effect transistors (SiNWFETs) are of great potential as a high-sensitivity charge sensor. The signal-to-noise ratio (SNR) of an SiNWFET sensor is ultimately limited by the intrinsic device noise generated by carrier trapping/detrapping processes at the gate oxide/silicon interface. This carrier trapping/detrapping-induced noise can be significantly reduced by replacing the noisy oxide/silicon interface with a Schottky junction gate (SJG) on the top of the SiNW. In~this paper, we~present a tri-SJG SiNWFET (Tri-SJGFET) with the SJG formed on both the top surface and the two sidewalls of the SiNW so as to enhance the gate control over the SiNW channel. Both experiment and simulation confirm that the additional sidewall gates in a narrow \hbox{Tri-SJGFET} indeed can confine the conduction path within the bulk of the SiNW channel away from the interfaces and significantly improve the immunity to the traps at the bottom buried oxide/silicon interface. Therefore, the~optimal low-frequency noise performance can be achieved without the need for any substrate bias. This new gating structure holds promises for further development of robust SiNWFET-based charge sensors with low noise and low operation voltage.

Keywords
Silicon nanowire field-effect transistor, Schottky junction, tri-gate, sensor, low frequency noise, charge sensing
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Engineering Science with specialization in Electronics
Identifiers
urn:nbn:se:uu:diva-380971 (URN)10.1109/TED.2019.2930067 (DOI)
Available from: 2019-04-02 Created: 2019-04-02 Last updated: 2019-08-05
Wen, C., Zeng, S., Li, S., Zhang, Z. & Zhang, S.-L. (2019). On rectification of ionic current in nanopores. Analytical Chemistry
Open this publication in new window or tab >>On rectification of ionic current in nanopores
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2019 (English)In: Analytical Chemistry, ISSN 0003-2700, E-ISSN 1520-6882Article in journal (Refereed) Submitted
National Category
Nano Technology
Identifiers
urn:nbn:se:uu:diva-384653 (URN)
Available from: 2019-06-07 Created: 2019-06-07 Last updated: 2019-06-19
Zeng, S., Wen, C., Solomon, P., Zhang, S.-L. & Zhang, Z. (2019). Rectification of protein translocation in truncated-pyramidal nanopores caused by the formation of electroosmotic vortex. Nature Nanotechnology
Open this publication in new window or tab >>Rectification of protein translocation in truncated-pyramidal nanopores caused by the formation of electroosmotic vortex
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2019 (English)In: Nature Nanotechnology, ISSN 1748-3387, E-ISSN 1748-3395Article in journal (Refereed) Submitted
National Category
Nano Technology
Identifiers
urn:nbn:se:uu:diva-384656 (URN)
Available from: 2019-06-07 Created: 2019-06-07 Last updated: 2019-06-19
Xu, X., Makaraviciute, A., Pettersson, J., Zhang, S.-L., Nyholm, L. & Zhang, Z. (2019). Revisiting the factors influencing gold electrodes prepared using cyclic voltammetry. Sensors and actuators. B, Chemical, 283, 146-153
Open this publication in new window or tab >>Revisiting the factors influencing gold electrodes prepared using cyclic voltammetry
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2019 (English)In: Sensors and actuators. B, Chemical, ISSN 0925-4005, E-ISSN 1873-3077, Vol. 283, p. 146-153Article in journal (Refereed) Published
Abstract [en]

Gold is widely used as the electrode material in different chemi- and biosensing applications while cyclic voltammetry (CV) in sulfuric acid solutions is a commonly employed method for gold surface preparation and characterization. However, as shown herein, chloride leakage from the Ag/AgCl/sat. KCl reference electrode and platinum dissolution from the platinum counter electrode can severely compromise the reproducibility and hence the reliability of the prepared gold electrodes. The aim of this work is to obtain a comprehensive understanding of the separate and interdependent effects of the aforementioned factors on the voltammetric behavior of microfabricated polycrystalline gold electrodes. It is shown that the leakage of chloride gives rise to etching of both the gold working and the platinum counter electrodes and that the chloride concentration has a strong influence on the ratio between the obtained gold and platinum concentrations in the electrolyte. The dissolved gold and platinum are then re-deposited on the gold electrode on the cathodic voltammetric scan, changing the structure and properties of the electrode. It is also demonstrated that the changes in the properties of the gold electrode are determined by the ratio between the co-deposited platinum and gold rather than the absolute amount of platinum deposited on the gold electrode. In addition, the chloride and sulfate adsorption behavior on the gold electrode is carefully investigated. It is proposed that redox peaks due to the formation ofthe corresponding Au(I) complexes can be seen in the double layer region of the voltammogram. The results show that the chloride leakage from the reference electrode needs to be carefully controlled and that platinum counter electrodes should be avoided when developing gold sensing electrodes. The present comprehensive understanding of the electrochemical performance of gold electrodes prepared using CV should be of significant importance in conjunction with both fundamental investigations and practical applications.

Keywords
gold electrode, cyclic voltammetry, platinum, electrde etching, chloride leakage, Au(I) complexes
National Category
Analytical Chemistry
Research subject
Chemistry with specialization in Inorganic Chemistry; Engineering Science with specialization in Solid State Physics
Identifiers
urn:nbn:se:uu:diva-372135 (URN)10.1016/j.snb.2018.12.008 (DOI)000455854000018 ()
Funder
Swedish Foundation for Strategic Research , ICA 12-0047Swedish Foundation for Strategic Research , FFL15-0174Swedish Research Council, 2014-5588Wallenberg Foundations, Academy Fellow
Available from: 2019-01-06 Created: 2019-01-06 Last updated: 2019-02-18Bibliographically approved
Chen, X., Chen, S., Solomon, P. & Zhang, Z. (2019). Top-bottom gate coupling effect on low frequency noise in a Schottky junction gated silicon nanowire field-effect transistor. IEEE Journal of the Electron Devices Society, 7, 696-700
Open this publication in new window or tab >>Top-bottom gate coupling effect on low frequency noise in a Schottky junction gated silicon nanowire field-effect transistor
2019 (English)In: IEEE Journal of the Electron Devices Society, ISSN 2168-6734, Vol. 7, p. 696-700Article in journal (Refereed) Published
Abstract [en]

In this letter, strong low frequency noise (LFN) reduction is observed when the buried oxide (BOX)/silicon interface of a Schottky junction gated silicon nanowire field-effect transistor (SJGFET) is depleted by a substrate bias. Such LFN reduction is mainly attributed to the dramatic reduction in Coulomb scattering when carriers are pushed away from the interface. The BOX/silicon interface depletion can also be achieved by sidewall Schottky junction gates in a narrow channel SJGFET, leading to an optimal LFN performance without the need of any substrate bias.

National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Engineering Science with specialization in Electronics
Identifiers
urn:nbn:se:uu:diva-380974 (URN)10.1109/JEDS.2019.2929163 (DOI)
Available from: 2019-04-02 Created: 2019-04-02 Last updated: 2019-08-05
Xu, X., Makaraviciute, A., Pettersson, J., Zhang, S.-L. & Zhang, Z. (2018). Considerations for the Cyclic Voltammetry of Gold in Sulfuric Acid Solutions. In: : . Paper presented at 69th Annual Meeting of the International Society of Electrochemistry in Bologna.
Open this publication in new window or tab >>Considerations for the Cyclic Voltammetry of Gold in Sulfuric Acid Solutions
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2018 (English)Conference paper, Poster (with or without abstract) (Other academic)
Abstract [en]

A comprehensive understanding of the cyclic voltammetry (CV) for gold surfaces is essential for advanced applications. In the present study, a series of experiments were designed to investigate CV for gold under different experimental conditions when using a conventional configuration of a Ag/AgCl/sat. KCl reference electrode and a platinum wire counter electrode. The interferences introduced by the configuration were reflected in the three fingerprint regions of the voltammograms. It was found that the shape of the voltammograms was less reproducible at a lower sample volume when the cycle number was increased. This observation could be explained by different concentrations of Cl- leaking from the reference electrode and platinum dissolved from the counter electrode. The reproducibility of the gold oxidation and reduction (Ox/Re) region in the voltammograms was improved when gold dissolution and re-deposition caused by Cl- leakage was eliminated by using a bridge. In the hydrogen evolution and oxidation reactions (HER/HOR) region the catalytic performance of the gold electrode could be minimized by replacing the platinum counter electrode with a graphite rod. Alternatively, it could be enhanced by increasing the surface ratio of the co-deposited platinum to gold. In the electric double layer (EDL) region, peaks dependent on the concentrations of Cl- and SO42- were observed. To account for the occurrence of these peaks, a new mechanism based on the formation of neutral gold (I) complexes at very low Au+ concentrations, was proposed. 

National Category
Physical Chemistry Other Chemical Engineering
Identifiers
urn:nbn:se:uu:diva-363362 (URN)
Conference
69th Annual Meeting of the International Society of Electrochemistry in Bologna
Available from: 2018-10-17 Created: 2018-10-17 Last updated: 2018-10-18Bibliographically approved
Hu, Q., Chen, X., Norström, H., Zeng, S., Yifei, L., Fredrik, G., . . . Zhang, Z. (2018). Current gain and low-frequency noise of symmetriclateral bipolar junction transistors on SOI. In: : . Paper presented at 48th European Solid-State Device Research Conference, September 3 - 6, 2018, Dresden, Germany.
Open this publication in new window or tab >>Current gain and low-frequency noise of symmetriclateral bipolar junction transistors on SOI
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2018 (English)Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents a comprehensive study ofsymmetric lateral bipolar junction transistors (LBJTs) fabricatedon SOI substrate using a CMOS-compatible process; LBJTs findmany applications including being a local signal amplifier forsilicon-nanowire sensors. Our LBJTs are characterized by a peakgain (β) over 50 and low-frequency noise two orders ofmagnitude lower than what typically is of the SiO2/Si interfacefor a MOSFET. β is found to decrease at low base current due torecombination in the space charge region at the emitter-basejunction and at the surrounding SiO2/Si interfaces. This decreasecan be mitigated by properly biasing the substrate.

Keywords
symmetric lateral bipolar junction transitor; current amplification; low frequency noise; silicon nanowire field-effect transitor
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:uu:diva-364155 (URN)
Conference
48th European Solid-State Device Research Conference, September 3 - 6, 2018, Dresden, Germany
Note

Qitao Hu and Xi Chen contribute equally to the work.

Available from: 2018-10-24 Created: 2018-10-24 Last updated: 2019-04-03Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0003-4317-9701

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