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Atig, Mohamed FaouziORCID iD iconorcid.org/0000-0001-8229-3481
Publications (10 of 70) Show all publications
Abdulla, P. A., Atig, M. F., Phi Diep, B., Holik, L. & Janku, P. (2019). Chain-Free String Constraints. In: Automated Technology for Verification and Analysis: . Paper presented at ATVA 2019, October 28–31, Taipei, Taiwan (pp. 277-293). Springer
Open this publication in new window or tab >>Chain-Free String Constraints
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2019 (English)In: Automated Technology for Verification and Analysis, Springer, 2019, p. 277-293Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
Springer, 2019
Series
Lecture Notes in Computer Science ; 11781
National Category
Computer Sciences
Identifiers
urn:nbn:se:uu:diva-398254 (URN)10.1007/978-3-030-31784-3_16 (DOI)978-3-030-31783-6 (ISBN)
Conference
ATVA 2019, October 28–31, Taipei, Taiwan
Available from: 2019-10-21 Created: 2019-12-04 Last updated: 2019-12-04Bibliographically approved
Abdulla, P., Atig, M. F., Jonsson, B., Lång, M., Ngo, T.-P. & Sagonas, K. (2019). Optimal stateless model checking for reads-from equivalence under sequential consistency. Proceedings of the ACM on programming languages
Open this publication in new window or tab >>Optimal stateless model checking for reads-from equivalence under sequential consistency
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2019 (English)In: Proceedings of the ACM on programming languages, ISSN 2475-1421Article in journal (Refereed) Published
Abstract [en]

We present a new approach for stateless model checking (SMC) of multithreaded programs under Sequential Consistency (SC) semantics.  To combat state-space explosion, SMC is often equipped with a partial-order reduction technique, which defines an equivalence on executions, and only needs to explore one execution in each equivalence class.  Recently, it has been observed that the commonly used equivalence of Mazurkiewicz traces can be coarsened but still cover all program crashes and assertion violations.  However, for this coarser equivalence, which preserves only the reads-from relation from writes to reads, there is no SMC algorithm which is (i) optimal in the sense that it explores precisely one execution in each reads-from equivalence class, and (ii) efficient in the sense that it spends polynomial effort per class.  \end{inparaenum} We present the first SMC algorithm for SC that is both optimal and efficient in practice, meaning that it spends polynomial time per equivalence class on all programs that we have tried.  This is achieved by a novel test that checks whether a given reads-from relation can arise in some execution.  Our experimental results show that Nidhugg/rfsc, although slower than the fastest SMC tools in programs where tools happen to examine the same number of executions, always scales similarly or better than them, and outperforms them by an exponential factor in programs where the reads-from equivalence is coarser than the standard one. We also present two non-trivial use cases where the new equivalence is particularly effective, as well as the significant performance advantage that Nidhugg/rfsc offers compared to state-of-the-art SMC and systematic concurrency testing tools.

Keywords
concurrent programs, sequential consistency, program verification, stateless model checking, dynamic partial order reduction
National Category
Computer Sciences
Research subject
Computer Science
Identifiers
urn:nbn:se:uu:diva-396320 (URN)10.1145/3360576 (DOI)
Available from: 2019-11-03 Created: 2019-11-03 Last updated: 2019-11-03
Abdulla, P. A., Cyriac, A., Atig, M. F. & Montali, M. (2019). Reachability in database-driven systems with numerical attributes under recency bounding. In: PODS '19: Proceedings of the 38th ACM SIGMOD-SIGACT-SIGAI Symposium on Principles of Database Systems. Paper presented at 38th ACM SIGMOD-SIGACT-SIGAI Symposium on Principles of Database Systems (PODS), Amsterdam, Netherlands, July 1-3, 2019 (pp. 335-352). New York: ACM Press
Open this publication in new window or tab >>Reachability in database-driven systems with numerical attributes under recency bounding
2019 (English)In: PODS '19: Proceedings of the 38th ACM SIGMOD-SIGACT-SIGAI Symposium on Principles of Database Systems, New York: ACM Press, 2019, p. 335-352Conference paper, Published paper (Refereed)
Abstract [en]

A prominent research direction of the database theory community is to develop techniques for verification of database-driven systems operating over relational and numerical data. Along this line, we lift the framework of database manipulating systems [3] which handle relational data to also accommodate numerical data and the natural order on them. We study an under-approximation called recency bounding under which the most basic verification problem-reachability, is decidable. Even under this under-approximation the reachability space is infinite in multiple dimensions - owing to the unbounded sizes of the active domain, the unbounded numerical domain it has access to, and the unbounded length of the executions. We show that, nevertheless, reachability is ExpTime complete. Going beyond reachability to LTL model checking renders verification undecidable.

Place, publisher, year, edition, pages
New York: ACM Press, 2019
National Category
Computer Sciences
Identifiers
urn:nbn:se:uu:diva-398249 (URN)10.1145/3294052.3319705 (DOI)000502009600024 ()978-1-4503-6227-6 (ISBN)
Conference
38th ACM SIGMOD-SIGACT-SIGAI Symposium on Principles of Database Systems (PODS), Amsterdam, Netherlands, July 1-3, 2019
Available from: 2019-06-25 Created: 2019-12-04 Last updated: 2020-01-14Bibliographically approved
Abdulla, P. A., Arora, J., Atig, M. F. & Krishna, S. N. (2019). Verification of programs under the release-acquire semantics. In: Proc. 40th ACM SIGPLAN Conference on Programming Language Design and Implementation: . Paper presented at PLDI 2019, June 22–26, Phoenix, AZ (pp. 1117-1132). New York: ACM Press
Open this publication in new window or tab >>Verification of programs under the release-acquire semantics
2019 (English)In: Proc. 40th ACM SIGPLAN Conference on Programming Language Design and Implementation, New York: ACM Press, 2019, p. 1117-1132Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
New York: ACM Press, 2019
National Category
Computer Sciences
Identifiers
urn:nbn:se:uu:diva-398252 (URN)10.1145/3314221.3314649 (DOI)978-1-4503-6712-7 (ISBN)
Conference
PLDI 2019, June 22–26, Phoenix, AZ
Available from: 2019-06-08 Created: 2019-12-04 Last updated: 2019-12-04Bibliographically approved
Abdulla, P. A., Atig, M. F., Bouajjani, A. & Ngo, T. P. (2018). A load-buffer semantics for total store ordering. Logical Methods in Computer Science, 14(1), Article ID 9.
Open this publication in new window or tab >>A load-buffer semantics for total store ordering
2018 (English)In: Logical Methods in Computer Science, ISSN 1860-5974, E-ISSN 1860-5974, Vol. 14, no 1, article id 9Article in journal (Refereed) Published
Abstract [en]

We address the problem of verifying safety properties of concurrent programs running over the Total Store Order (TSO) memory model. Known decision procedures for this model are based on complex encodings of store buffers as lossy channels. These procedures assume that the number of processes is fixed. However, it is important in general to prove the correctness of a system/algorithm in a parametric way with an arbitrarily large number of processes. 

In this paper, we introduce an alternative (yet equivalent) semantics to the classical one for the TSO semantics that is more amenable to efficient algorithmic verification and for the extension to parametric verification. For that, we adopt a dual view where load buffers are used instead of store buffers. The flow of information is now from the memory to load buffers. We show that this new semantics allows (1) to simplify drastically the safety analysis under TSO, (2) to obtain a spectacular gain in efficiency and scalability compared to existing procedures, and (3) to extend easily the decision procedure to the parametric case, which allows obtaining a new decidability result, and more importantly, a verification algorithm that is more general and more efficient in practice than the one for bounded instances.

Keywords
Verification, TSO, concurrent program, safety property, well-structured transition system
National Category
Computer Sciences
Research subject
Computer Science
Identifiers
urn:nbn:se:uu:diva-337278 (URN)000426512000008 ()
Projects
UPMARC
Available from: 2018-01-23 Created: 2017-12-21 Last updated: 2018-11-21
Abdulla, P. A., Aiswarya, C., Atig, M. F., Montali, M. & Rezine, O. (2018). Complexity of reachability for data-aware dynamic systems. In: Proc. 18th International Conference on Application of Concurrency to System Design: . Paper presented at ACSD 2018, June 24–29, Bratislava, Slovakia (pp. 11-20). IEEE Computer Society
Open this publication in new window or tab >>Complexity of reachability for data-aware dynamic systems
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2018 (English)In: Proc. 18th International Conference on Application of Concurrency to System Design, IEEE Computer Society, 2018, p. 11-20Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
IEEE Computer Society, 2018
National Category
Computer Sciences
Identifiers
urn:nbn:se:uu:diva-367961 (URN)10.1109/ACSD.2018.000-3 (DOI)978-1-5386-7013-2 (ISBN)
Conference
ACSD 2018, June 24–29, Bratislava, Slovakia
Available from: 2018-11-30 Created: 2018-11-30 Last updated: 2018-12-07Bibliographically approved
Abdulla, P. A., Atig, M. F., Kaxiras, S., Leonardsson, C., Ros, A. & Zhu, Y. (2018). Mending fences with self-invalidation and self-downgrade. Logical Methods in Computer Science, 14(1), Article ID 6.
Open this publication in new window or tab >>Mending fences with self-invalidation and self-downgrade
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2018 (English)In: Logical Methods in Computer Science, ISSN 1860-5974, E-ISSN 1860-5974, Vol. 14, no 1, article id 6Article in journal (Refereed) Published
National Category
Computer Sciences
Identifiers
urn:nbn:se:uu:diva-347675 (URN)000426512000004 ()
Available from: 2018-01-16 Created: 2018-04-06 Last updated: 2018-05-17Bibliographically approved
Ngo, T.-P., Abdulla, P., Jonsson, B. & Atig, M. F. (2018). Optimal Stateless Model Checking under the Release-Acquire Semantics. In: SPLASH OOPSLA 2018, Boston, Nov 4-9, 2018: . Paper presented at SPLASH OOPSLA 2018. ACM Digital Library
Open this publication in new window or tab >>Optimal Stateless Model Checking under the Release-Acquire Semantics
2018 (English)In: SPLASH OOPSLA 2018, Boston, Nov 4-9, 2018, ACM Digital Library, 2018Conference paper, Published paper (Refereed)
Abstract [en]

We present a framework for efficient application of stateless model checking (SMC) to concurrent programs running under the Release-Acquire (RA) fragment of the C/C++11 memory model. Our approach is based on exploring the possible program orders, which define the order in which instructions of a thread are executed, and read-from relations, which define how reads obtain their values from writes. This is in contrast to previous approaches, which in addition explore the possible coherence orders, i.e., orderings between conflicting writes. Since unexpected test results such as program crashes or assertion violations depend only on the read-from relation, we avoid a potentially large source of redundancy. Our framework is based on a novel technique for determining whether a particular read-from relation is feasible under the RA semantics. We define an SMC algorithm which is provably optimal in the sense that it explores each program order and read-from relation exactly once. This optimality result is strictly stronger than previous analogous optimality results, which also take coherence order into account. We have implemented our framework in the tool Tracer. Experiments show that Tracer can be significantly faster than state-of-the-art tools that can handle the RA semantics.

Place, publisher, year, edition, pages
ACM Digital Library, 2018
Keywords
Software model checking, C/C++11, Release-Acquire, Concurrent program
National Category
Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:uu:diva-358241 (URN)
Conference
SPLASH OOPSLA 2018
Projects
UPMARC
Available from: 2018-08-26 Created: 2018-08-26 Last updated: 2019-01-09Bibliographically approved
Abdulla, P. A., Atig, M. F. & Krishna, S. N. (2018). Perfect timed communication is hard. In: Formal Modeling and Analysis of Timed Systems: . Paper presented at FORMATS 2018, September 4–6, Beijing, China (pp. 91-107). Springer
Open this publication in new window or tab >>Perfect timed communication is hard
2018 (English)In: Formal Modeling and Analysis of Timed Systems, Springer, 2018, p. 91-107Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
Springer, 2018
Series
Lecture Notes in Computer Science ; 11022
National Category
Computer Sciences
Identifiers
urn:nbn:se:uu:diva-367964 (URN)10.1007/978-3-030-00151-3_6 (DOI)978-3-030-00150-6 (ISBN)
Conference
FORMATS 2018, September 4–6, Beijing, China
Projects
UPMARC
Available from: 2018-08-26 Created: 2018-11-30 Last updated: 2018-12-07Bibliographically approved
Abdulla, P. A., Atig, M. F., Bouajjani, A. & Ngo, T. P. (2018). Replacing store buffers by load buffers in TSO. In: Verification and Evaluation of Computer and Communication Systems: . Paper presented at VECoS 2018, September 26–28, Grenoble, France (pp. 22-28). Springer
Open this publication in new window or tab >>Replacing store buffers by load buffers in TSO
2018 (English)In: Verification and Evaluation of Computer and Communication Systems, Springer, 2018, p. 22-28Conference paper, Published paper (Refereed)
Abstract [en]

We consider the weak memory model of Total Store Ordering (TSO). In the classical definition of TSO, an unbounded buffer is inserted between each process and the shared memory. The buffers contains pending store operations of the processes. We introduce a new model where we replace the store buffers by load buffers. In contrast to the classical model, the buffers now contain load operations. We show that the models have equivalent behaviors in the sense that the processes reach identical sets of states when the input program is run under the two models.

Place, publisher, year, edition, pages
Springer, 2018
Series
Lecture Notes in Computer Science, ISSN 0302-9743, E-ISSN 1611-3349 ; 11181
Keywords
Program verification, Weak memory models, TSO
National Category
Computer Systems
Identifiers
urn:nbn:se:uu:diva-366357 (URN)10.1007/978-3-030-00359-3_2 (DOI)000477758000002 ()978-3-030-00358-6 (ISBN)978-3-030-00359-3 (ISBN)
Conference
VECoS 2018, September 26–28, Grenoble, France
Projects
UPMARC
Available from: 2018-08-31 Created: 2018-11-20 Last updated: 2019-09-18Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0001-8229-3481

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