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Ngo, T.-P. (2019). Model Checking of Software Systems under Weak Memory Models. (Doctoral dissertation). Uppsala: Acta Universitatis Upsaliensis
Open this publication in new window or tab >>Model Checking of Software Systems under Weak Memory Models
2019 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

When a program is compiled and run on a modern architecture, different optimizations may be applied to gain in efficiency. In particular, the access operations (e.g., read and write) to the shared memory may be performed in an out-of-order manner, i.e., in a different order than the order in which the operations have been issued by the program. The reordering of memory access operations leads to efficient use of instruction pipelines and thus an improvement in program execution times. However, the gain in this efficiency comes at a price. More precisely, programs running under modern architectures may exhibit unexpected behaviors by programmers. The out-of-order execution has led to the invention of new program semantics, called weak memory model (WMM). One crucial problem is to ensure the correctness of concurrent programs running under weak memory models.

The thesis proposes three techniques for reasoning and analyzing concurrent programs running under WMMs. The first one is a sound and complete analysis technique for finite-state programs running under the TSO semantics (Paper II). This technique is based on a novel and equivalent semantics for TSO, called Dual TSO semantics, and on the use of well-structured transition framework. The second technique is an under-approximation technique that can be used to detect bugs under the POWER semantics (Paper III). This technique is based on bounding the number of contexts in an explored execution where, in each context, there is only one active process. The third technique is also an under-approximation technique based on systematic testing (a.k.a. stateless model checking). This approach has been used to develop an optimal and efficient systematic testing approach for concurrent programs running under the Release-Acquire semantics (Paper IV).

The thesis also considers the problem of effectively finding a minimal set of fences that guarantees the correctness of a concurrent program running under WMMs (Paper I). A fence (a.k.a. barrier) is an operation that can be inserted in the program to prohibit certain reorderings between operations issued before and after the fence. Since fences are expensive, it is crucial to automatically find a minimal set of fences to ensure the program correctness. This thesis presents a method for automatic fence insertion in programs running under the TSO semantics that offers the best-known trade-off between the efficiency and optimality of the algorithm. The technique is based on a novel notion of correctness, called Persistence, that compares the behaviors of a program running under WMMs to that running under the SC semantics.

Place, publisher, year, edition, pages
Uppsala: Acta Universitatis Upsaliensis, 2019. p. 61
Series
Digital Comprehensive Summaries of Uppsala Dissertations from the Faculty of Science and Technology, ISSN 1651-6214 ; 1745
Keywords
Model checking, Concurrent program, Weak memory model
National Category
Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:uu:diva-366361 (URN)978-91-513-0506-6 (ISBN)
Public defence
2019-01-21, 2446, Department of Information Technology, Polacksbacken (Lägerhyddsvägen 2), Uppsala, 13:15 (English)
Opponent
Supervisors
Projects
UPMARC
Available from: 2018-12-17 Created: 2018-11-20 Last updated: 2019-01-25
Abdulla, P. A., Atig, M. F., Bouajjani, A. & Ngo, T. P. (2018). A load-buffer semantics for total store ordering. Logical Methods in Computer Science, 14(1), Article ID 9.
Open this publication in new window or tab >>A load-buffer semantics for total store ordering
2018 (English)In: Logical Methods in Computer Science, ISSN 1860-5974, E-ISSN 1860-5974, Vol. 14, no 1, article id 9Article in journal (Refereed) Published
Abstract [en]

We address the problem of verifying safety properties of concurrent programs running over the Total Store Order (TSO) memory model. Known decision procedures for this model are based on complex encodings of store buffers as lossy channels. These procedures assume that the number of processes is fixed. However, it is important in general to prove the correctness of a system/algorithm in a parametric way with an arbitrarily large number of processes. 

In this paper, we introduce an alternative (yet equivalent) semantics to the classical one for the TSO semantics that is more amenable to efficient algorithmic verification and for the extension to parametric verification. For that, we adopt a dual view where load buffers are used instead of store buffers. The flow of information is now from the memory to load buffers. We show that this new semantics allows (1) to simplify drastically the safety analysis under TSO, (2) to obtain a spectacular gain in efficiency and scalability compared to existing procedures, and (3) to extend easily the decision procedure to the parametric case, which allows obtaining a new decidability result, and more importantly, a verification algorithm that is more general and more efficient in practice than the one for bounded instances.

Keywords
Verification, TSO, concurrent program, safety property, well-structured transition system
National Category
Computer Sciences
Research subject
Computer Science
Identifiers
urn:nbn:se:uu:diva-337278 (URN)000426512000008 ()
Projects
UPMARC
Available from: 2018-01-23 Created: 2017-12-21 Last updated: 2018-11-21
Ngo, T.-P., Abdulla, P., Jonsson, B. & Atig, M. F. (2018). Optimal Stateless Model Checking under the Release-Acquire Semantics. In: SPLASH OOPSLA 2018, Boston, Nov 4-9, 2018: . Paper presented at SPLASH OOPSLA 2018. ACM Digital Library
Open this publication in new window or tab >>Optimal Stateless Model Checking under the Release-Acquire Semantics
2018 (English)In: SPLASH OOPSLA 2018, Boston, Nov 4-9, 2018, ACM Digital Library, 2018Conference paper, Published paper (Refereed)
Abstract [en]

We present a framework for efficient application of stateless model checking (SMC) to concurrent programs running under the Release-Acquire (RA) fragment of the C/C++11 memory model. Our approach is based on exploring the possible program orders, which define the order in which instructions of a thread are executed, and read-from relations, which define how reads obtain their values from writes. This is in contrast to previous approaches, which in addition explore the possible coherence orders, i.e., orderings between conflicting writes. Since unexpected test results such as program crashes or assertion violations depend only on the read-from relation, we avoid a potentially large source of redundancy. Our framework is based on a novel technique for determining whether a particular read-from relation is feasible under the RA semantics. We define an SMC algorithm which is provably optimal in the sense that it explores each program order and read-from relation exactly once. This optimality result is strictly stronger than previous analogous optimality results, which also take coherence order into account. We have implemented our framework in the tool Tracer. Experiments show that Tracer can be significantly faster than state-of-the-art tools that can handle the RA semantics.

Place, publisher, year, edition, pages
ACM Digital Library, 2018
Keywords
Software model checking, C/C++11, Release-Acquire, Concurrent program
National Category
Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:uu:diva-358241 (URN)
Conference
SPLASH OOPSLA 2018
Projects
UPMARC
Available from: 2018-08-26 Created: 2018-08-26 Last updated: 2019-01-09Bibliographically approved
Abdulla, P. A., Atig, M. F., Bouajjani, A. & Ngo, T. P. (2018). Replacing store buffers by load buffers in TSO. In: Verification and Evaluation of Computer and Communication Systems: . Paper presented at VECoS 2018, September 26–28, Grenoble, France (pp. 22-28). Springer
Open this publication in new window or tab >>Replacing store buffers by load buffers in TSO
2018 (English)In: Verification and Evaluation of Computer and Communication Systems, Springer, 2018, p. 22-28Conference paper, Published paper (Refereed)
Abstract [en]

We consider the weak memory model of Total Store Ordering (TSO). In the classical definition of TSO, an unbounded buffer is inserted between each process and the shared memory. The buffers contains pending store operations of the processes. We introduce a new model where we replace the store buffers by load buffers. In contrast to the classical model, the buffers now contain load operations. We show that the models have equivalent behaviors in the sense that the processes reach identical sets of states when the input program is run under the two models.

Place, publisher, year, edition, pages
Springer, 2018
Series
Lecture Notes in Computer Science, ISSN 0302-9743, E-ISSN 1611-3349 ; 11181
Keywords
Program verification, Weak memory models, TSO
National Category
Computer Systems
Identifiers
urn:nbn:se:uu:diva-366357 (URN)10.1007/978-3-030-00359-3_2 (DOI)000477758000002 ()978-3-030-00358-6 (ISBN)978-3-030-00359-3 (ISBN)
Conference
VECoS 2018, September 26–28, Grenoble, France
Projects
UPMARC
Available from: 2018-08-31 Created: 2018-11-20 Last updated: 2019-09-18Bibliographically approved
Abdulla, P. A., Atig, M. F., Bouajjani, A. & Ngo, T. P. (2017). Context-bounded analysis for POWER. In: Tools and Algorithms for the Construction and Analysis of Systems: Part II. Paper presented at 23rd International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS), 2017, April 22–29, Uppsala, Sweden (pp. 56-74). Springer
Open this publication in new window or tab >>Context-bounded analysis for POWER
2017 (English)In: Tools and Algorithms for the Construction and Analysis of Systems: Part II, Springer, 2017, p. 56-74Conference paper, Published paper (Refereed)
Abstract [en]

We propose an under-approximate reachability analysis algorithm for programs running under the POWER memory model, in the spirit of the work on context-bounded analysis initiated by Qadeer et al. in 2005 for detecting bugs in concurrent programs (supposed to be running under the classical SC model). To that end, we first introduce a new notion of context-bounding that is suitable for reasoning about computations under POWER, which generalizes the one defined by Atig et al. in 2011 for the TSO memory model. Then, we provide a polynomial size reduction of the context-bounded state reachability problem under POWER to the same problem under SC: Given an input concurrent program P, our method produces a concurrent program P' such that, for a fixed number of context switches, running P' under SC yields the same set of reachable states as running P under POWER. The generated program P' contains the same number of processes as P and operates on the same data domain. By leveraging the standard model checker CBMC, we have implemented a prototype tool and applied it on a set of benchmarks, showing the feasibility of our approach.

Place, publisher, year, edition, pages
Springer, 2017
Series
Lecture Notes in Computer Science, ISSN 0302-9743, E-ISSN 1611-3349 ; 10206
Keywords
POWER, weak memory model, under approximation, translation, concurrent program, testing
National Category
Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:uu:diva-314901 (URN)10.1007/978-3-662-54580-5_4 (DOI)000440733400004 ()978-3-662-54579-9 (ISBN)
Conference
23rd International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS), 2017, April 22–29, Uppsala, Sweden
Projects
UPMARC
Available from: 2017-03-31 Created: 2017-02-07 Last updated: 2018-11-21Bibliographically approved
Abdulla, P. A., Atig, M. F., Bouajjani, A. & Ngo, T. P. (2016). The benefits of duality in verifying concurrent programs under TSO. In: 27th International Conference on Concurrency Theory: CONCUR 2016. Paper presented at CONCUR 2016, August 23–26, Québec City, Canada (pp. 5:1-15). Dagstuhl, Germany: Leibniz-Zentrum für Informatik
Open this publication in new window or tab >>The benefits of duality in verifying concurrent programs under TSO
2016 (English)In: 27th International Conference on Concurrency Theory: CONCUR 2016, Dagstuhl, Germany: Leibniz-Zentrum für Informatik , 2016, p. 5:1-15Conference paper, Published paper (Refereed)
Abstract [en]

We address the problem of verifying safety properties of concurrent programs running over the Total Store Order (TSO) memory model. Known decision procedures for this model are based on complex encodings of store buffers as lossy channels. These procedures assume that the number of processes is fixed. However, it is important in general to prove the correctness of a system/algorithm in a parametric way with an arbitrarily large number of processes.

In this paper, we introduce an alternative (yet equivalent) semantics to the classical one for the TSO semantics that is more amenable to efficient algorithmic verification and for the extension to parametric verification. For that, we adopt a dual view where load buffers are used instead of store buffers. The flow of information is now from the memory to load buffers. We show that this new semantics allows (1) to simplify drastically the safety analysis under TSO, (2) to obtain a spectacular gain in efficiency and scalability compared to existing procedures, and (3) to extend easily the decision procedure to the parametric case, which allows obtaining a new decidability result, and more importantly, a verification algorithm that is more general and more efficient in practice than the one for bounded instances.

Place, publisher, year, edition, pages
Dagstuhl, Germany: Leibniz-Zentrum für Informatik, 2016
Series
Leibniz International Proceedings in Informatics (LIPIcs), ISSN 1868-8969 ; 59
Keywords
Total Store Order, Weak Memory Models, Reachability Problem, Parameterized Systems, Well-quasi-ordering
National Category
Computer Sciences
Identifiers
urn:nbn:se:uu:diva-298663 (URN)10.4230/LIPIcs.CONCUR.2016.5 (DOI)978-3-95977-017-0 (ISBN)
Conference
CONCUR 2016, August 23–26, Québec City, Canada
Projects
UPMARC
Available from: 2016-08-16 Created: 2016-07-06 Last updated: 2018-11-20
Abdulla, P. A., Atig, M. F., Lång, M. & Ngo, T. P. (2015). Precise and sound automatic fence insertion procedure under PSO. In: Networked Systems: NETYS 2015. Paper presented at NETYS 2015, May 13–15, Agadir, Morocco (pp. 32-47). Springer
Open this publication in new window or tab >>Precise and sound automatic fence insertion procedure under PSO
2015 (English)In: Networked Systems: NETYS 2015, Springer, 2015, p. 32-47Conference paper, Published paper (Refereed)
Abstract [en]

We give a sound and complete procedure for fence insertion for concurrent finite-state programs running under the PSO memory model. This model allows ''write to read'' and ''write-to-write'' relaxations corresponding to the addition of an unbounded store buffers between processors and the main memory. We introduce a novel machine model, called the Hierarchical Single-Buffer (HSB) semantics, and show that the reachability problem for a program under PSO can be reduced to the reachability problem under HSB. We present a simple and effective backward reachability analysis algorithm for the latter, and propose a counter-example guided fence insertion procedure. The procedure infers automatically a minimal set of fences that ensure correctness of the program. We have implemented a prototype and run it successfully on all standard benchmarks, together with several challenging examples.

Place, publisher, year, edition, pages
Springer, 2015
Series
Lecture Notes in Computer Science ; 9466
Keywords
PSO, weak memory model, well-quasi order, well-structured transition system, concurrent program, verification
National Category
Computer Sciences
Identifiers
urn:nbn:se:uu:diva-253647 (URN)10.1007/978-3-319-26850-7_3 (DOI)978-3-319-26849-1 (ISBN)
Conference
NETYS 2015, May 13–15, Agadir, Morocco
Projects
UPMARC
Available from: 2016-03-23 Created: 2015-05-29 Last updated: 2018-11-20
Abdulla, P. A., Atig, M. F. & Ngo, T.-P. (2015). The Best of Both Worlds: Trading efficiency and optimality in fence insertion for TSO. In: Programming Languages and Systems: ESOP 2015. Paper presented at 24th European Symposium on Programming, ESOP 2015, April 11–18, London, UK (pp. 308-332). Springer Berlin/Heidelberg
Open this publication in new window or tab >>The Best of Both Worlds: Trading efficiency and optimality in fence insertion for TSO
2015 (English)In: Programming Languages and Systems: ESOP 2015, Springer Berlin/Heidelberg, 2015, p. 308-332Conference paper, Published paper (Refereed)
Abstract [en]

We present a method for automatic fence insertion in concurrent programs running under weak memory models that provides the best known trade-off between efficiency and optimality. On the one hand, the method can efficiently handle complex aspects of program behaviors such as unbounded buffers and large numbers of processes. On the other hand, it is able to find small sets of fences needed for ensuring correctness of the program. To this end, we propose a novel notion of correctness, called persistence, that compares the behavior of the program under the weak memory semantics with that under the classical interleaving (SC) semantics. We instantiate our framework for the Total Store Ordering (TSO) memory model, and give an algorithm that reduces the fence insertion problem under TSO to the reachability problem for programs running under SC. Furthermore, we provide an abstraction scheme that substantially increases scalability to large numbers of processes. Based on our method, we have implemented a tool and run it successfully on a wide range benchmarks.

Place, publisher, year, edition, pages
Springer Berlin/Heidelberg, 2015
Series
Lecture Notes in Computer Science, ISSN 0302-9743 ; 9032
Keywords
weak memory, correctness, verification, TSO, concurrent program
National Category
Computer Sciences
Research subject
Computer Science
Identifiers
urn:nbn:se:uu:diva-253645 (URN)10.1007/978-3-662-46669-8_13 (DOI)000361751400013 ()978-3-662-46668-1 (ISBN)
Conference
24th European Symposium on Programming, ESOP 2015, April 11–18, London, UK
Projects
UPMARC
Available from: 2015-05-29 Created: 2015-05-29 Last updated: 2018-11-21
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0003-4993-0092

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