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Non-speculative load-load reordering in TSO
Univ Murcia, Dept Comp Engn, Murcia, Spain.
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorarkitektur och datorkommunikation. (UART)
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorarkitektur och datorkommunikation. (UART)
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorarkitektur och datorkommunikation. (UART)
2017 (engelsk)Inngår i: Proc. 44th International Symposium on Computer Architecture, New York: ACM Press, 2017, s. 187-200Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

In Total Store Order memory consistency (TSO), loads can be speculatively reordered to improve performance. If a load-load reordering is seen by other cores, speculative loads must be squashed and re-executed. In architectures with an unordered interconnection network and directory coherence, this has been the established view for decades. We show, for the first time, that it is not necessary to squash and re-execute speculatively reordered loads in TSO when their reordering is seen. Instead, the reordering can be hidden form other cores by the coherence protocol. The implication is that we can irrevocably bind speculative loads. This allows us to commit reordered loads out-of-order without having to wait (for the loads to become non-speculative) or without having to checkpoint committed state (and rollback if needed), just to ensure correctness in the rare case of some core seeing the reordering. We show that by exposing a reordering to the coherence layer and by appropriately modifying a typical directory protocol we can successfully hide load-load reordering without perceptible performance cost and without deadlock. Our solution is cost-effective and increases the performance of out-of-order commit by a sizable margin, compared to the base case where memory operations are not allowed to commit if the consistency model could be violated.

sted, utgiver, år, opplag, sider
New York: ACM Press, 2017. s. 187-200
Emneord [en]
Cache coherence, memory consistency, TSO, load reordering, out-of-order commit
HSV kategori
Identifikatorer
URN: urn:nbn:se:uu:diva-323468DOI: 10.1145/3079856.3080220ISI: 000426483300015ISBN: 978-1-4503-4892-8 (tryckt)OAI: oai:DiVA.org:uu-323468DiVA, id: diva2:1106350
Konferanse
ISCA 2017, June 24–28, Toronto, Canada
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UPMARC
Forskningsfinansiär
Swedish Research Council, 621-2012-5332Tilgjengelig fra: 2017-06-24 Laget: 2017-06-07 Sist oppdatert: 2018-06-08bibliografisk kontrollert

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