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Matrix-free finite-element operator application on graphics processing units
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Avdelningen för beräkningsvetenskap. Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Tillämpad beräkningsvetenskap.
2014 (engelsk)Inngår i: Euro-Par 2014: Parallel Processing Workshops, Part II, Springer, 2014, s. 450-461Konferansepaper, Publicerat paper (Fagfellevurdert)
sted, utgiver, år, opplag, sider
Springer, 2014. s. 450-461
Serie
Lecture Notes in Computer Science ; 8806
HSV kategori
Identifikatorer
URN: urn:nbn:se:uu:diva-238380DOI: 10.1007/978-3-319-14313-2_38ISI: 000354785000038ISBN: 978-3-319-14312-5 (tryckt)OAI: oai:DiVA.org:uu-238380DiVA, id: diva2:770982
Konferanse
7th Workshop on Unconventional High-Performance Computing
Prosjekter
UPMARCeSSENCETilgjengelig fra: 2014-12-11 Laget: 2014-12-11 Sist oppdatert: 2018-01-11bibliografisk kontrollert
Inngår i avhandling
1. Techniques for finite element methods on modern processors
Åpne denne publikasjonen i ny fane eller vindu >>Techniques for finite element methods on modern processors
2015 (engelsk)Licentiatavhandling, med artikler (Annet vitenskapelig)
Abstract [en]

In this thesis, methods for efficient utilization of modern computer hardware for numerical simulation are considered. In particular, we study techniques for speeding up the execution of finite-element methods.

One of the greatest challenges in finite-element computation is how to efficiently perform the the system matrix assembly efficiently in parallel, due to its complicated memory access pattern. The main difficulty lies in the fact that many entries of the matrix are being updated concurrently by several parallel threads. We consider transactional memory, an exotic hardware feature for concurrent update of shared variables, and conduct benchmarks on a prototype processor supporting it. Our experiments show that transactions can both simplify programming and provide good performance for concurrent updates of floating point data.

Furthermore, we study a matrix-free approach to finite-element computation which avoids the matrix assembly. Motivated by its computational properties, we implement the matrix-free method for execution on graphics processors, using either atomic updates or a mesh coloring approach to handle the concurrent updates. A performance study shows that on the GPU, the matrix-free method is faster than a matrix-based implementation for many element types, and allows for solution of considerably larger problems. This suggests that the matrix-free method can speed up execution of large realistic simulations.

sted, utgiver, år, opplag, sider
Uppsala University, 2015
Serie
IT licentiate theses / Uppsala University, Department of Information Technology, ISSN 1404-5117 ; 2015-001
HSV kategori
Forskningsprogram
Beräkningsvetenskap
Identifikatorer
urn:nbn:se:uu:diva-242186 (URN)
Veileder
Prosjekter
UPMARCeSSENCE
Tilgjengelig fra: 2015-01-18 Laget: 2015-01-22 Sist oppdatert: 2018-01-11bibliografisk kontrollert
2. Finite Element Computations on Multicore and Graphics Processors
Åpne denne publikasjonen i ny fane eller vindu >>Finite Element Computations on Multicore and Graphics Processors
2017 (engelsk)Doktoravhandling, med artikler (Annet vitenskapelig)
Abstract [en]

In this thesis, techniques for efficient utilization of modern computer hardwarefor numerical simulation are considered. In particular, we study techniques for improving the performance of computations using the finite element method.

One of the main difficulties in finite-element computations is how to perform the assembly of the system matrix efficiently in parallel, due to its complicated memory access pattern. The challenge lies in the fact that many entries of the matrix are being updated concurrently by several parallel threads. We consider transactional memory, an exotic hardware feature for concurrent update of shared variables, and conduct benchmarks on a prototype multicore processor supporting it. Our experiments show that transactions can both simplify programming and provide good performance for concurrent updates of floating point data.

Secondly, we study a matrix-free approach to finite-element computation which avoids the matrix assembly. In addition to removing the need to store the system matrix, matrix-free methods are attractive due to their low memory footprint and therefore better match the architecture of modern processors where memory bandwidth is scarce and compute power is abundant. Motivated by this, we consider matrix-free implementations of high-order finite-element methods for execution on graphics processors, which have seen a revolutionary increase in usage for numerical computations during recent years due to their more efficient architecture. In the implementation, we exploit sum-factorization techniques for efficient evaluation of matrix-vector products, mesh coloring and atomic updates for concurrent updates, and a geometric multigrid algorithm for efficient preconditioning of iterative solvers. Our performance studies show that on the GPU, a matrix-free approach is the method of choice for elements of order two and higher, yielding both a significantly faster execution, and allowing for solution of considerably larger problems. Compared to corresponding CPU implementations executed on comparable multicore processors, the GPU implementation is about twice as fast, suggesting that graphics processors are about twice as power efficient as multicores for computations of this kind.

sted, utgiver, år, opplag, sider
Uppsala: Acta Universitatis Upsaliensis, 2017. s. 64
Serie
Digital Comprehensive Summaries of Uppsala Dissertations from the Faculty of Science and Technology, ISSN 1651-6214 ; 1512
Emneord
Finite Element Methods, GPU, Matrix-Free, Multigrid, Transactional Memory
HSV kategori
Forskningsprogram
Beräkningsvetenskap
Identifikatorer
urn:nbn:se:uu:diva-320147 (URN)978-91-554-9907-5 (ISBN)
Disputas
2017-06-09, ITC 2446, Lägerhyddsvägen 2, Uppsala, 10:15 (engelsk)
Opponent
Veileder
Prosjekter
UPMARC
Tilgjengelig fra: 2017-05-16 Laget: 2017-04-17 Sist oppdatert: 2019-02-25

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