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The development and implementation of a metal gate technology (alloy, compound, or silicide) into metal-oxide-semiconductor field effect transistors (MOSFETs) is necessary to extend the life of planar CMOS devices and enable further downscaling. This thesis examines possible metal gate materials for improving the performance of the gate stack and discusses process integration as well as improved electrical and physical measurement methodologies, tested on capacitor structures and transistors.

By using reactive PVD and gradually increasing the N₂/Ar flow ratio, it was found that the work function (on SiO₂) of the TiN_x and ZrN_x metal systems could be modulated ~0.7 eV from low near nMOS work functions to high pMOS work functions. After high-temperature anneals corresponding to junction activation, both metals systems reached mid-gap work function values. The mechanisms behind the work function changes are explained with XPS data and discussed in terms of metal gradients and Fermi level pinning due to extrinsic interface states.

A modified scheme for improved Fowler-Nordheim tunnelling is also shown, using degenerately doped silicon substrates. In that case, the work functions of ALD/PVD TaN were accurately determined on both SiO₂ and HfO₂ and benchmarked against IPE (Internal Photoemission) results. KFM (Kelvin Force Microscopy) was also used to physically measure the work functions of PVD TiN and Mo deposited on SiO₂; the results agreed well with C-V and I-V data.

Finally, an appealing combination of novel materials is demonstrated with ALD TiN/Al₂O₃/HfAlO_x/Al₂O₃/strained-SiGe surface channel pMOS devices. The drive current and transconductance were measured to be 30% higher than the Si reference, clearly demonstrating increased mobility and the absence of polydepletion. Finally, using similarly processed transistors with Al₂O₃ dielectric instead, low-temperature water vapour annealing was shown to improve the device characteristics by reducing the negative charge within the ALD Al₂O₃.