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Efficient invisible speculative execution through selective delay and value prediction
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorarkitektur och datorkommunikation.ORCID-id: 0000-0003-4172-8607
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorarkitektur och datorkommunikation.
University of Murcia, Murcia, Spain.ORCID-id: 0000-0001-5757-1064
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorarkitektur och datorkommunikation.
Vise andre og tillknytning
2019 (engelsk)Inngår i: Proc. 46th International Symposium on Computer Architecture, New York: ACM Press, 2019, s. 723-735Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

Speculative execution, the base on which modern high-performance general-purpose CPUs are built on, has recently been shown to enable a slew of security attacks.  All these attacks are centered around a common set of behaviors: During speculative execution, the architectural state of the system is kept unmodified, until the speculation can be verified.  In the event that a misspeculation occurs, then anything that can affect the architectural state is reverted (squashed) and re-executed correctly.  However, the same is not true for the microarchitectural state.  Normally invisible to the user, changes to the microarchitectural state can be observed through various side-channels, with timing differences caused by the memory hierarchy being one of the most common and easy to exploit.  The speculative side-channels can then be exploited to perform attacks that can bypass software and hardware checks in order to leak information.  These attacks, out of which the most infamous are perhaps Spectre and Meltdown, have led to a frantic search for solutions.In this work, we present our own solution for reducing the microarchitectural state-changes caused by speculative execution in the memory hierarchy.  It is based on the observation that if we only allow accesses that hit in the L1 data cache to proceed, then we can easily hide any microarchitectural changes until after the speculation has been verified.  At the same time, we propose to prevent stalls by value predicting the loads that miss in the L1.  Value prediction, though speculative, constitutes an invisible form of speculation, not seen outside the core.  We evaluate our solution and show that we can prevent observable microarchitectural changes in the memory hierarchy while keeping the performance and energy costs at 11% and 7%, respectively.  In comparison, the current state of the art solution, InvisiSpec, incurs a 46% performance loss and a 51% energy increase.

sted, utgiver, år, opplag, sider
New York: ACM Press, 2019. s. 723-735
Emneord [en]
caches, side-channel attacks, speculative execution
HSV kategori
Identifikatorer
URN: urn:nbn:se:uu:diva-387329DOI: 10.1145/3307650.3322216ISBN: 978-1-4503-6669-4 (tryckt)OAI: oai:DiVA.org:uu-387329DiVA, id: diva2:1328541
Konferanse
ISCA 2019, June 22–26, Phoenix, AZ, USA
Forskningsfinansiär
Swedish Research Council, 2015-05159Swedish Foundation for Strategic Research , SM17-0064
Merknad

Tilgjengelig fra: 2019-06-22 Laget: 2019-06-21 Sist oppdatert: 2020-01-30bibliografisk kontrollert
Inngår i avhandling
1. Securing the Memory Hierarchy from Speculative Side-Channel Attack
Åpne denne publikasjonen i ny fane eller vindu >>Securing the Memory Hierarchy from Speculative Side-Channel Attack
2020 (engelsk)Licentiatavhandling, med artikler (Annet vitenskapelig)
Abstract [en]

Modern high-performance CPUs depend on speculative out-of-order execution in order to offer high performance while also remaining energy efficient. However, with the introduction of Meltdown and Spectre in the beginning of 2018, speculative execution has been under attack. These exploits, and the many that followed, take advantage of the unchecked nature of speculative execution and the microarchitectural changes it causes in order to mount speculative side-channel attacks. Such attacks can bypass software and hardware barriers and gain access to sensitive information while remaining invisible to the application. In this thesis we will describe our work on preventing speculative side-channel attacks that exploit the memory hierarchy as their side-channel. Specifically, we will discuss two different approaches, one were we do not restrict speculative execution but try to keep its microarchitectural side-effects hidden, and one where we delay speculative memory accesses if we determine that they might lead to information leakage. We will discuss the advantages and disadvantages of both approaches, compare them against other state-of-the-art solutions, and show that it is possible to achieve secure, invisible speculation while at the same time maintaining high performance and efficiency.

sted, utgiver, år, opplag, sider
Uppsala: Uppsala University, 2020. s. 128
Serie
IT licentiate theses / Uppsala University, Department of Information Technology, ISSN 1404-5117 ; 2020-003
HSV kategori
Forskningsprogram
Datavetenskap
Identifikatorer
urn:nbn:se:uu:diva-403547 (URN)
Presentation
(engelsk)
Opponent
Veileder
Forskningsfinansiär
Swedish Research Council, 2015-05159
Tilgjengelig fra: 2020-02-19 Laget: 2020-01-30 Sist oppdatert: 2020-02-19bibliografisk kontrollert

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