uu.seUppsala universitets publikasjoner
Endre søk
RefereraExporteraLink to record
Permanent link

Direct link
Referera
Referensformat
  • apa
  • ieee
  • modern-language-association
  • vancouver
  • Annet format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annet språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf
General and Efficient Response Time Analysis for EDF Scheduling
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorteknik. (Embedded Systems)
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorteknik. (Embedded Systems)
2014 (engelsk)Inngår i: Proc. 17th Conference on Design, Automation and Test in Europe, Piscataway, NJ: IEEE , 2014Konferansepaper, Publicerat paper (Annet vitenskapelig)
sted, utgiver, år, opplag, sider
Piscataway, NJ: IEEE , 2014.
HSV kategori
Identifikatorer
URN: urn:nbn:se:uu:diva-209546DOI: 10.7873/DATE.2014.268ISI: 000354965500255ISBN: 978-3-9815370-2-4 (tryckt)OAI: oai:DiVA.org:uu-209546DiVA, id: diva2:658397
Konferanse
DATE 2014, March 24–28, Dresden, Germany
Prosjekter
UPMARCTilgjengelig fra: 2013-10-21 Laget: 2013-10-21 Sist oppdatert: 2015-12-16bibliografisk kontrollert
Inngår i avhandling
1. New Techniques for Building Timing-Predictable Embedded Systems
Åpne denne publikasjonen i ny fane eller vindu >>New Techniques for Building Timing-Predictable Embedded Systems
2013 (engelsk)Doktoravhandling, med artikler (Annet vitenskapelig)
Abstract [en]

Embedded systems are becoming ubiquitous in our daily life. Due to close interaction with physical world, embedded systems are typically subject to timing constraints. At design time, it must be ensured that the run-time behaviors of such systems satisfy the pre-specified timing constraints under any circumstance. In this thesis, we develop techniques to address the timing analysis problems brought by the increasing complexity of underlying hardware and software on different levels of abstraction in embedded systems design.

On the program level, we develop quantitative analysis techniques to predict the cache hit/miss behaviors for tight WCET estimation, and study two commonly used replacement policies, MRU and FIFO, which cannot be analyzed adequately using the state-of-the-art qualitative cache analysis method. Our quantitative approach greatly improves the precision of WCET estimation and discloses interesting predictability properties of these replacement policies, which are concealed in the qualitative analysis framework.

On the component level, we address the challenges raised by multi-core computing. Several fundamental problems in multiprocessor scheduling are investigated. In global scheduling, we propose an analysis method to rule out a great part of impossible system behaviors for better analysis precision, and establish conditions to guarantee the bounded responsiveness of computing tasks. In partitioned scheduling, we close a long standing open problem to generalize the famous Liu and Layland's utilization bound in uniprocessor real-time scheduling to multiprocessor systems. We also propose to use cache partitioning for multi-core systems to avoid contentions on shared caches, and solve the underlying schedulability analysis problem.

On the system level, we present techniques to improve the Real-Time Calculus (RTC) analysis framework in both efficiency and precision. First, we have developed Finitary Real-Time Calculus to solve the scalability problem of the original RTC due to period explosion. The key idea is to only maintain and operate on a limited prefix of each curve that is relevant to the final results during the whole analysis procedure. We further improve the analysis precision of EDF components in RTC, by precisely bounding the response time of each computation request.

sted, utgiver, år, opplag, sider
Uppsala: Acta Universitatis Upsaliensis, 2013. s. 45
Serie
Digital Comprehensive Summaries of Uppsala Dissertations from the Faculty of Science and Technology, ISSN 1651-6214 ; 1094
Emneord
Real-time systems, WCET analysis, cache analysis, abstract interpretation, multiprocessor scheduling, fixed-priority scheduling, EDF, multi-core processors, response time analysis, utilization bound, real-time calculus, scalability
HSV kategori
Forskningsprogram
Datavetenskap med inriktning mot realtidssystem
Identifikatorer
urn:nbn:se:uu:diva-209623 (URN)978-91-554-8797-3 (ISBN)
Disputas
2013-12-17, Room 2446, Polacksbacken, Lägerhyddsvägen 2, Uppsala, 13:15 (engelsk)
Opponent
Veileder
Prosjekter
UPMARC
Tilgjengelig fra: 2013-11-26 Laget: 2013-10-22 Sist oppdatert: 2019-02-25

Open Access i DiVA

Fulltekst mangler i DiVA

Andre lenker

Forlagets fulltekst

Personposter BETA

Guan, NanYi, Wang

Søk i DiVA

Av forfatter/redaktør
Guan, NanYi, Wang
Av organisasjonen

Søk utenfor DiVA

GoogleGoogle Scholar

doi
isbn
urn-nbn

Altmetric

doi
isbn
urn-nbn
Totalt: 539 treff
RefereraExporteraLink to record
Permanent link

Direct link
Referera
Referensformat
  • apa
  • ieee
  • modern-language-association
  • vancouver
  • Annet format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annet språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf