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Finitary Real-Time Calculus: Efficient Performance Analysis of Distributed Embedded Systems
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorteknik. (Embedded Systems)
Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Matematisk-datavetenskapliga sektionen, Institutionen för informationsteknologi, Datorteknik. (Embedded Systems)
2013 (engelsk)Inngår i: Proc. Real-Time Systems Symposium: RTSS 2013, IEEE Computer Society, 2013Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

Real-Time Calculus (RTC) is a powerful framework to analyzereal-time performance of distributed embedded systems. However,RTC may run into serious analysis efficiency problems when appliedto systems of large scale and/or with complex timing parameter characteristics.The main reason is that many RTC operations generatecurves with periods equal to the hyper-period of the input curves.Therefore, the analysis in RTC has exponential complexity. In practisethe curve periods may explode rapidly when several componentsare serially connected, which leads to low analysis efficiency.In this work, we propose Finitary RTC to solve the above problem.Finitary RTC only maintains and operates on a limited part ofeach curve that is relevant to the final analysis results, which resultsin pseudo-polynomial computational complexity. Experiments showthat Finitary RTC can drastically improve the analysis efficiency overthe original RTC. The original RTC may take hours or even days toanalyze systems with complex timing characteristics, but FinitaryRTC typically can complete the analysis in seconds. Even for simplesystems, Finitary RTC also typically speeds up the analysis procedureby hundreds of times. While getting better efficiency, FinitaryRTC does not introduce any extra pessimism, i.e., it yields analysisresults as precise as the original RTC.

sted, utgiver, år, opplag, sider
IEEE Computer Society, 2013.
HSV kategori
Forskningsprogram
Datavetenskap med inriktning mot realtidssystem
Identifikatorer
URN: urn:nbn:se:uu:diva-209549OAI: oai:DiVA.org:uu-209549DiVA, id: diva2:658400
Konferanse
RTSS 2013
Prosjekter
UPMARCTilgjengelig fra: 2013-10-21 Laget: 2013-10-21 Sist oppdatert: 2014-01-23
Inngår i avhandling
1. New Techniques for Building Timing-Predictable Embedded Systems
Åpne denne publikasjonen i ny fane eller vindu >>New Techniques for Building Timing-Predictable Embedded Systems
2013 (engelsk)Doktoravhandling, med artikler (Annet vitenskapelig)
Abstract [en]

Embedded systems are becoming ubiquitous in our daily life. Due to close interaction with physical world, embedded systems are typically subject to timing constraints. At design time, it must be ensured that the run-time behaviors of such systems satisfy the pre-specified timing constraints under any circumstance. In this thesis, we develop techniques to address the timing analysis problems brought by the increasing complexity of underlying hardware and software on different levels of abstraction in embedded systems design.

On the program level, we develop quantitative analysis techniques to predict the cache hit/miss behaviors for tight WCET estimation, and study two commonly used replacement policies, MRU and FIFO, which cannot be analyzed adequately using the state-of-the-art qualitative cache analysis method. Our quantitative approach greatly improves the precision of WCET estimation and discloses interesting predictability properties of these replacement policies, which are concealed in the qualitative analysis framework.

On the component level, we address the challenges raised by multi-core computing. Several fundamental problems in multiprocessor scheduling are investigated. In global scheduling, we propose an analysis method to rule out a great part of impossible system behaviors for better analysis precision, and establish conditions to guarantee the bounded responsiveness of computing tasks. In partitioned scheduling, we close a long standing open problem to generalize the famous Liu and Layland's utilization bound in uniprocessor real-time scheduling to multiprocessor systems. We also propose to use cache partitioning for multi-core systems to avoid contentions on shared caches, and solve the underlying schedulability analysis problem.

On the system level, we present techniques to improve the Real-Time Calculus (RTC) analysis framework in both efficiency and precision. First, we have developed Finitary Real-Time Calculus to solve the scalability problem of the original RTC due to period explosion. The key idea is to only maintain and operate on a limited prefix of each curve that is relevant to the final results during the whole analysis procedure. We further improve the analysis precision of EDF components in RTC, by precisely bounding the response time of each computation request.

sted, utgiver, år, opplag, sider
Uppsala: Acta Universitatis Upsaliensis, 2013. s. 45
Serie
Digital Comprehensive Summaries of Uppsala Dissertations from the Faculty of Science and Technology, ISSN 1651-6214 ; 1094
Emneord
Real-time systems, WCET analysis, cache analysis, abstract interpretation, multiprocessor scheduling, fixed-priority scheduling, EDF, multi-core processors, response time analysis, utilization bound, real-time calculus, scalability
HSV kategori
Forskningsprogram
Datavetenskap med inriktning mot realtidssystem
Identifikatorer
urn:nbn:se:uu:diva-209623 (URN)978-91-554-8797-3 (ISBN)
Disputas
2013-12-17, Room 2446, Polacksbacken, Lägerhyddsvägen 2, Uppsala, 13:15 (engelsk)
Opponent
Veileder
Prosjekter
UPMARC
Tilgjengelig fra: 2013-11-26 Laget: 2013-10-22 Sist oppdatert: 2019-02-25

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