Micro Architecture Independent Data Locality Analysis of Multi Threaded Applications on Multi Core Processors
Independent thesis Advanced level (professional degree), 20 credits / 30 HE creditsStudent thesis
In today's computing a significant amount of energy is spent on the movement of data and data related stalls. In order to understand how this energy is spent and can be reduced, we need efficient models of the cache hierarchy. This thesis builds on previous work to create a tool to aid developers in quickly estimating cache behavior of multi-threaded programs on multi-core architectures.
The tool consists of a profiler that sparsely collects data of a program's memory references and thread interactions, and an analyzer that uses the collected data to estimate cache miss ratios. The tool is able to both model shared and separate caches. For the shared caches a new way of modeling constructive coherence is created.
Micro-benchmarks and benchmarks from SPLASH-2 and PARSEC benchmark suites are used to validate the functionality of the tool. The tool estimates the miss ratios accurately in most configurations, but is less accurate for small cache sizes. This is consistent with single-threaded studies of the analytical model technique which the tool is based on. The new constructive coherence modeling shows a significant improvement for shared caches, where it detects when threads with shared data-set helps to keeping data inside the cache.
The performance of the profiler scales well for both the number of threads and size of benchmark, while the analyzer faces scaling difficulties with the number of threads.
Place, publisher, year, edition, pages
2016. , 61 p.
UPTEC F, ISSN 1401-5757 ; 16051
Cache modeling, Data locality, Multi-threaded, Multi-core
IdentifiersURN: urn:nbn:se:uu:diva-311742OAI: oai:DiVA.org:uu-311742DiVA: diva2:1061251
Master Programme in Engineering Physics
Black-Schaffer, David, Universitetslektor
Nyberg, Tomas, ForskareHagersten, Erik, Professor