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Matrix-free finite-element computations on graphics processors with adaptively refined unstructured meshes
Uppsala University, Disciplinary Domain of Science and Technology, Mathematics and Computer Science, Department of Information Technology, Division of Scientific Computing. Uppsala University, Disciplinary Domain of Science and Technology, Mathematics and Computer Science, Department of Information Technology, Computational Science.
2017 (English)In: Proc. 25th High Performance Computing Symposium, San Diego, CA: The Society for Modeling and Simulation International, 2017, 1-12 p.Conference paper, (Refereed)
Place, publisher, year, edition, pages
San Diego, CA: The Society for Modeling and Simulation International, 2017. 1-12 p.
National Category
Computer Science Computational Mathematics
Identifiers
URN: urn:nbn:se:uu:diva-320146ISBN: 978-1-5108-3822-2 (print)OAI: oai:DiVA.org:uu-320146DiVA: diva2:1088816
Conference
HPC 2017, April 23–26, Virginia Beach, VA
Available from: 2017-04-26 Created: 2017-04-16 Last updated: 2017-06-28Bibliographically approved
In thesis
1. Finite Element Computations on Multicore and Graphics Processors
Open this publication in new window or tab >>Finite Element Computations on Multicore and Graphics Processors
2017 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

In this thesis, techniques for efficient utilization of modern computer hardwarefor numerical simulation are considered. In particular, we study techniques for improving the performance of computations using the finite element method.

One of the main difficulties in finite-element computations is how to perform the assembly of the system matrix efficiently in parallel, due to its complicated memory access pattern. The challenge lies in the fact that many entries of the matrix are being updated concurrently by several parallel threads. We consider transactional memory, an exotic hardware feature for concurrent update of shared variables, and conduct benchmarks on a prototype multicore processor supporting it. Our experiments show that transactions can both simplify programming and provide good performance for concurrent updates of floating point data.

Secondly, we study a matrix-free approach to finite-element computation which avoids the matrix assembly. In addition to removing the need to store the system matrix, matrix-free methods are attractive due to their low memory footprint and therefore better match the architecture of modern processors where memory bandwidth is scarce and compute power is abundant. Motivated by this, we consider matrix-free implementations of high-order finite-element methods for execution on graphics processors, which have seen a revolutionary increase in usage for numerical computations during recent years due to their more efficient architecture. In the implementation, we exploit sum-factorization techniques for efficient evaluation of matrix-vector products, mesh coloring and atomic updates for concurrent updates, and a geometric multigrid algorithm for efficient preconditioning of iterative solvers. Our performance studies show that on the GPU, a matrix-free approach is the method of choice for elements of order two and higher, yielding both a significantly faster execution, and allowing for solution of considerably larger problems. Compared to corresponding CPU implementations executed on comparable multicore processors, the GPU implementation is about twice as fast, suggesting that graphics processors are about twice as power efficient as multicores for computations of this kind.

Place, publisher, year, edition, pages
Uppsala: Acta Universitatis Upsaliensis, 2017. 64 p.
Series
Digital Comprehensive Summaries of Uppsala Dissertations from the Faculty of Science and Technology, ISSN 1651-6214 ; 1512
Keyword
Finite Element Methods, GPU, Matrix-Free, Multigrid, Transactional Memory
National Category
Computer Science Computational Mathematics
Research subject
Scientific Computing
Identifiers
urn:nbn:se:uu:diva-320147 (URN)978-91-554-9907-5 (ISBN)
Public defence
2017-06-09, ITC 2446, Lägerhyddsvägen 2, Uppsala, 10:15 (English)
Opponent
Supervisors
Available from: 2017-05-16 Created: 2017-04-17 Last updated: 2017-06-28

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Citation style
  • apa
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Output format
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