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POSTER: Putting the G back into GPU/CPU Systems Research
Uppsala University, Disciplinary Domain of Science and Technology, Mathematics and Computer Science, Department of Information Technology, Computer Systems.
Uppsala University, Disciplinary Domain of Science and Technology, Mathematics and Computer Science, Department of Information Technology, Computer Systems.
Uppsala University, Disciplinary Domain of Science and Technology, Mathematics and Computer Science, Department of Information Technology, Computer Systems.
Uppsala University, Disciplinary Domain of Science and Technology, Mathematics and Computer Science, Department of Information Technology, Computer Systems.
2017 (English)In: 2017 26TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES (PACT), 2017, p. 130-131Conference paper, Published paper (Refereed)
Abstract [en]

Modern SoCs contain several CPU cores and many GPU cores to execute both general purpose and highly-parallel graphics workloads. In many SoCs, more area is dedicated to graphics than to general purpose compute. Despite this, the micro-architecture research community primarily focuses on GPGPU and CPU-only research, and not on graphics (the primary workload for many SoCs). The main reason for this is the lack of efficient tools and simulators for modern graphics applications. This work focuses on the GPU's memory traffic generated by graphics. We describe a new graphics tracing framework and use it to both study graphics applications' memory behavior as well as how CPUs and GPUs affect system performance. Our results show that graphics applications exhibit a wide range of memory behavior between applications and across time, and slows down co-running SPEC applications by 59% on average.

Place, publisher, year, edition, pages
2017. p. 130-131
Series
International Conference on Parallel Architectures and Compilation Techniques, ISSN 1089-795X
National Category
Computer Systems Computer Engineering
Identifiers
URN: urn:nbn:se:uu:diva-347752DOI: 10.1109/PACT.2017.60ISI: 000417411300011ISBN: 978-1-5090-6764-0 OAI: oai:DiVA.org:uu-347752DiVA, id: diva2:1198362
Conference
26th International Conference on Parallel Architectures and Compilation Techniques (PACT), SEP 09-13, 2017, Portland, OR, USA.
Available from: 2018-04-17 Created: 2018-04-17 Last updated: 2018-04-17Bibliographically approved

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Sembrant, AndreasCarlson, Trevor E.Hagersten, ErikBlack-Schaffer, David

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