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Device noise reduction for Silicon nanowire field-effect-transistor based sensors by using a Schottky junction gate
Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
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2019 (English)In: ACS sensors, ISSN 2379-3694, Vol. 4, no 2, p. 427-433Article in journal (Refereed) Published
Abstract [en]

The sensitivity of metal-oxide-semiconductor field-effect transistor (MOSFET) based nanoscale sensors is ultimately limited by noise induced by carrier trapping/detrapping processes at the gate oxide/semiconductor interfaces. We have designed a Schottky junction gated silicon nanowire field-effect transistor (SiNW-SJGFET) sensor, where the Schottky junction replaces the noisy oxide/semiconductor interface. Our sensor exhibits significantly reduced noise, 2.1×10-9 V2µm2/Hz at 1 Hz, compared to reference devices with the oxide/semiconductor interface operated at both inversion and depletion modes. Further improvement can be anticipated by wrapping the nanowire by such a Schottky junction thereby eliminating all oxide/semiconductor interfaces. Hence, a combination of the low-noise SiNW-SJGFET sensor device with a sensing surface of the Nernstian response limit holds promises for future high signal-to-noise ratio sensor applications.

Place, publisher, year, edition, pages
2019. Vol. 4, no 2, p. 427-433
Keywords [en]
Noise reduction, schottky junction gate, silicon nanowire, field-effect transistor, low frequency noise, ion sensor
National Category
Nano Technology Signal Processing
Identifiers
URN: urn:nbn:se:uu:diva-374776DOI: 10.1021/acssensors.8b0139ISI: 000459836400021PubMedID: 30632733OAI: oai:DiVA.org:uu-374776DiVA, id: diva2:1282138
Funder
Swedish Foundation for Strategic Research , SSF ICA 12-0047Swedish Foundation for Strategic Research , FFL15-0174Swedish Research Council, VR 2014-5588Knut and Alice Wallenberg FoundationAvailable from: 2019-01-24 Created: 2019-01-24 Last updated: 2019-04-03Bibliographically approved
In thesis
1. Silicon Nanowire Field-Effect Devices as Low-Noise Sensors
Open this publication in new window or tab >>Silicon Nanowire Field-Effect Devices as Low-Noise Sensors
2019 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

In the past decades, silicon nanowire field-effect transistors (SiNWFETs) have been explored for label-free, highly sensitive, and real-time detections of chemical and biological species. The SiNWFETs are anticipated for sensing analyte at ultralow concentrations, even at single-molecule level, owing to their significantly improved charge sensitivity over large-area FETs. In a SiNWFET sensor, a change in electrical potential associated with biomolecular interactions in close proximity to the SiNW gate terminal can effectively control the underlying channel and modulate the drain-to-source current (IDS) of the SiNWFET. A readout signal is therefore generated. This signal is primarily determined by the surface properties of the sensing layer on the gate terminal, with sensitivity close up to the Nernstian limit widely demonstrated. To achieve a high signal-to-noise ratio (SNR), it is essential for the SiNWFETs to possess low noise of which intrinsic device noise is one of the major components. In metal-oxide-semiconductor (MOS)-type FETs, the intrinsic noise mainly results from carrier trapping/detrapping at the gate oxide/semiconductor interface and it is inversely proportional to the device area.

This thesis presents a comprehensive study on design, fabrication, and noise reduction of SiNWFET-based sensors on silicon-on-oxide (SOI) substrate. A novel Schottky junction gated SiNWFET (SJGFET) is designed and experimentally demonstrated for low noise applications. Firstly, a robust process employing photo- and electron-beam mixed-lithography was developed to reliably produce sub-10 nm SiNW structures for SiNWFET fabrication. For a proof-of-concept demonstration, MOS-type SiNWFET sensors were fabricated and applied for multiplexed ion detection using ionophore-doped mixed-matrix membranes as sensing layers. To address the fundamental noise issue of the MOS-type SiNWFETs, SJGFETs were fabricated with a Schottky (PtSi/silicon) junction gate on the top surface of the SiNW channel, replacing the noisy gate oxide/silicon interface in the MOS-type SiNWFETs. The resultant SJGFETs exhibited a close-to-ideal gate coupling efficiency (60 mV/dec) and significantly reduced device noise compared to reference MOS-type SiNWFETs. Further optimization was performed by implementing a three-dimensional Schottky junction gate wrapping both top surface and two sidewalls of the SiNW channel. The tri-gate SJGFETs with optimized geometry exhibited significantly enhanced electrostatic control over the channel, thereby confined IDS in the SiNW bulk, which greatly improved the device noise immunity to the traps at bottom buried oxide/silicon interface. Finally, a lateral bipolar junction transistor (LBJT) was also designed and fabricated on a SOI substrate aiming for immediate sensor current amplification. Integrating SJGFETs with LBJTs is expected to significantly suppress environmental interference and improve the overall SNR especially under low sensor current situations.

Place, publisher, year, edition, pages
Uppsala: Acta Universitatis Upsaliensis, 2019. p. 69
Series
Digital Comprehensive Summaries of Uppsala Dissertations from the Faculty of Science and Technology, ISSN 1651-6214 ; 1794
Keywords
Silicon nanowire, field-effect transistor, Schottky junction gate, low frequency noise, ion sensor
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Engineering Science with specialization in Electronics
Identifiers
urn:nbn:se:uu:diva-381049 (URN)978-91-513-0625-4 (ISBN)
Public defence
2019-05-27, Polhemsalen, Ångströmlaboratoriet, Lägerhyddsvägen 1, Uppsala, 09:00 (English)
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Supervisors
Available from: 2019-05-02 Created: 2019-04-03 Last updated: 2019-06-17

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Chen, XiChen, SiHu, QitaoZhang, Shi-LiSolomon, PaulZhang, Zhen

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