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Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing
Xilinx Res Labs, Dublin, Ireland.
Xilinx Res Labs, Dublin, Ireland;Politecn Milan, Milan, Italy.
Norwegian Univ Sci & Technol, Trondheim, Norway.
Accem Technol GmbH, Dresden, Germany.
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2019 (English)In: ACM Transactions on Reconfigurable Technology and Systems, ISSN 1936-7406, E-ISSN 1936-7414, Vol. 12, no 3, article id 15Article in journal (Refereed) Published
Abstract [en]

Matrix-matrix multiplication is a key computational kernel for numerous applications in science and engineering, with ample parallelism and data locality that lends itself well to high-performance implementations. Many matrix multiplication-dependent applications can use reduced-precision integer or fixed-point representations to increase their performance and energy efficiency while still offering adequate quality of results. However, precision requirements may vary between different application phases or depend on input data, rendering constant-precision solutions ineffective. BISMO, a vectorized bit-serial matrix multiplication overlay for reconfigurable computing, previously utilized the excellent binary-operation performance of FPGAs to offer a matrix multiplication performance that scales with required precision and parallelism. We show how BISMO can be scaled up on Xilinx FPGAs using an arithmetic architecture that better utilizes six-input LUTs. The improved BISMO achieves a peak performance of 15.4 binary TOPS on the Ultra96 board with a Xilinx UltraScale+ MPSoC.

Place, publisher, year, edition, pages
ASSOC COMPUTING MACHINERY , 2019. Vol. 12, no 3, article id 15
Keywords [en]
Bit serial, matrix multiplication, overlay, FPGA
National Category
Embedded Systems Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:uu:diva-398429DOI: 10.1145/3337929ISI: 000496751500006OAI: oai:DiVA.org:uu-398429DiVA, id: diva2:1375945
Funder
Swedish Research Council, 2015-05159Available from: 2019-12-06 Created: 2019-12-06 Last updated: 2019-12-06Bibliographically approved

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Själander, Magnus

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