Investigation of the electrical behavior of an asymmetric MOSFET
2003 (English)In: Microelectronic Engineering, ISSN 0167-9317, Vol. 65, no 4, 428-438 p.Article in journal (Refereed) Published
In this study a possible approach for improving breakdown voltage while maintaining fT for a MOSFET, is presented. In a conventional MOSFET process with LDD the S/D is implanted with a large tilt angle, which gives an asymmetry due to the shadowing effect by the gate. This asymmetry results in a longer drain-LDD region, which in combination with a lower LDD dose, could reduce the electrical field near the drain pinch-off region. A simulation study for different LDD doses and angles has been performed. It is shown that there exist an optimum range of LDD doses where the asymmetric device has higher figure-of-merit, concerning breakdown voltage and cut-off frequency, than the symmetric MOSFET structure.
Place, publisher, year, edition, pages
2003. Vol. 65, no 4, 428-438 p.
Asymmetric, LDD, MOSFET, Tilted implantation
Engineering and Technology
IdentifiersURN: urn:nbn:se:uu:diva-94492DOI: 10.1016/S0167-9317(03)00054-6OAI: oai:DiVA.org:uu-94492DiVA: diva2:168359