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SB-MOSFETs in UTB-SOI featuring PtSi source/drain with dopant segregation
Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
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2008 (English)In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 29, no 1, 125-127 p.Article in journal (Refereed) Published
Abstract [en]

MOSFETs of both polarities with PtSi-based Schottky-barrier source/drain (S/D) have been fabricated in ultrathin-body Si-on-insulator. The PtSi is formed in the S/D regions without lateral silicide growth under the gate spacers. This design leads to a 30-nm underlap between the PtSi-Si contacts and the gate edges resulting in low drive currents. Despite the underlap, excellent performance is achieved for both types of MOSFETs with large drive currents and low leakage by means of dopant segregation through As and B implantation into the PtSi followed by drive-in annealing at low temperatures.

Place, publisher, year, edition, pages
2008. Vol. 29, no 1, 125-127 p.
Keyword [en]
dopant segregation (DS), MOSFETs, platinum silicide, Schottky-barrier lowering, Schottky-barrier source/drain (SB-S/D), ultrathin-body Si-on-insulator (UTB-SOI)
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Electronics
Identifiers
URN: urn:nbn:se:uu:diva-99611DOI: 10.1109/LED.2007.911990ISI: 000252098100038OAI: oai:DiVA.org:uu-99611DiVA: diva2:208292
Available from: 2009-03-17 Created: 2009-03-17 Last updated: 2017-12-13

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Olsson, JörgenLu, JZhang, S-L

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