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Retargetable Graph-Coloring Register Allocation for Irregular Architectures
Uppsala University, Teknisk-naturvetenskapliga vetenskapsområdet, Mathematics and Computer Science, Department of Information Technology. Faculty of Science and Technology, Biology, Department of Ecology and Evolution, Computing Science.
Uppsala University, Teknisk-naturvetenskapliga vetenskapsområdet, Mathematics and Computer Science, Department of Information Technology. Faculty of Science and Technology, Biology, Department of Ecology and Evolution, Computing Science.
2003 (English)In: Software and Compilers for Embedded Systems: 7th International Workshop, SCOPES 2003, Vienna, Austria, September 24-26, 2003, Proceedings, 2003, p. 403-Conference paper, Published paper (Refereed)
Abstract [en]

Global register allocation is one of the most important optimizations in a compiler. Since the early 80s, register allocation by graph coloring has been the dominant approach. The traditional formulation of graph-coloring register allocation implicitly assumes a single bank of non-overlapping general-purpose registers and does not handle irregular architectural features like overlapping register pairs, special purpose registers, and multiple register banks. We present a generalization of graph-coloring register allocation that can handle all such irregularities. The algorithm is parameterized on a formal target description, allowing fully automatic retargeting. We report on experiments conducted with a prototype implementation in a framework based on a commercial compiler.

Place, publisher, year, edition, pages
2003. p. 403-
National Category
Information Systems
Identifiers
URN: urn:nbn:se:uu:diva-20469ISBN: 978-3-540-20145-8 (print)OAI: oai:DiVA.org:uu-20469DiVA, id: diva2:48242
Available from: 2006-12-09 Created: 2006-12-09 Last updated: 2018-01-12

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