Ultrathin Ni1-xPtx Films as Electrical Contact in CMOS Devices
2012 (English)In: Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 2 / [ed] Roozeboom, F; Kakushima, K; Iwai, H; Timans, PJ; Narayanan, V; Kwong, DL; Gusev, EP, 2012, 15-22 p.Conference paper (Refereed)
Metal silicide films are likely to continue their role as electrical contact in CMOS devices beyond the 22-nm technology node. For such devices, the thickness of the silicide films is projected by the technology roadmap to be below 10 nm. Nickel-based silicides, especially the monosilicide Ni1-xPtxSi obtained by alloying Ni with a certain fraction of Pt, are among the most competitive choices for this application. For this specific family of silicides, the latest experimental investigations show that upon identical formation conditions (temperature and time), the phase, crystallinity, and thickness of the resultant silicide films sensitively depend on the thickness and composition of the deposited Ni1-xPtx films. A proper understanding of these experimental observations is of vital implications in guiding technical designs for the formation of ultrathin Ni1-xPtx silicide films with desired properties.
This overview will start with a novel process that has recently been developed for a precise control of thickness and composition of the resultant ultrathin Ni1-xPtx silicide films below 10 nm thickness. A unique advantage of this process, in comparison with a range of other attempts such as precise metal thickness control and two-step annealing, is the silicide formation independent of the geometrical dimension of contact areas. In combination with dopant segregation technique by ion implantation of appropriate dopants into the formed ultrathin silicide films followed by a drive-in annealing at moderate temperatures, it is further shown that the Schottky barrier heights (SBHs) of the contact between such ultrathin silicide films and the Si substrate can be effectively modified. The modification is so substantial that the effective SBHs can be decreased from 0.3-0.8 eV to below 0.2 eV for both conduction polarities without much effort. This novel process is under further development for applications in devices of non-planar surfaces and fabricated on insulating substrates.
Place, publisher, year, edition, pages
2012. 15-22 p.
, ECS Transactions, ISSN 1938-5862 ; 45:6
Electrical Engineering, Electronic Engineering, Information Engineering
Research subject Engineering Science with specialization in Electronics
IdentifiersURN: urn:nbn:se:uu:diva-181985DOI: 10.1149/1.3700934ISI: 000316883400002ISBN: 978-1-60768-316-2OAI: oai:DiVA.org:uu-181985DiVA: diva2:558207
2nd International Symposium on Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications held as a part of the 221st Meeting of the Electrochemical-Society, Seattle, USA, May 6-11, 2012
Invited talk published in ECS Trans. 46, 15 (2012).2012-10-022012-10-022013-05-08Bibliographically approved