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Hysteresis-free thin-film transistors achieved by novel solution-processing of nanotubes/polymer composites
Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
Fudan University, Kina.
Fudan University, Kina.
Royal Institute of Technology, Sweden.
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2012 (English)In: Materials Research Society Spring Meeting 2012, San Francisco, April 9-13, 2012., 2012Conference paper, Presentation (Refereed)
Abstract [en]

Thin-film transistors (TFTs) based on single-walled carbon nanotubes (SWCNTs) have gained enormous attention in the community of flexible/stretchable electronics. At present, such TFTs often suffer from severe problems including giant hysteresis in their transfer characteristics. With SiO2 as the gate dielectric, extensive investigations have led to generally accepted understanding of the hysteresis as being caused by charge transfer between the SWCNTs and their surroundings including both water molecules bound on the SiO2 surface (Si≡OH) and the water/oxygen molecules in the ambient atmosphere. In order to combat the hysteresis issue, significant efforts have been made by annealing the TFTs in vacuum and separating SWCNTs from SiO2 by deposition of a self-assembled monolayer (SAM) on the SiO2 or passivating the SWCNTs with an organic or inorganic dielectric film. These methods, however, require either processing in inert environment or developing elaborated processes. In the present work, we demonstrate hysteresis-free TFTs based on SWCNT/polymer composite without any complex treatment. The composite consists of SWCNTs and poly-9,9_dioctyl-fluorene-co-bithiophene (F8T2). With the aid of polymer F8T2, SWCNTs can be efficiently dissolved in commonly used solvents thereby forming a uniform composite solution. By soaking a chip with predefined TFT structures on an oxidized Si substrate in the composite solution, direct assembly of the composite on the SiO2 occurs, leading to the formation of a composite thin film in the channel region of the TFTs. Although fabricated using a very simple process, our TFTs exhibit hysteresis-free operation under ambient conditions. It is plausible to suggest that SWCNTs are embedded in the F8T2 matrix with the latter providing an effective shield for the former against the trap sites on the SiO2 and the H2O/O2 molecules in the atmosphere. In comparison to the other reported means aiming at hysteresis reduction, the present method is simple, robust, solution processable, effective, and operable under ambient conditions. In addition, we have found F8T2 to preferentially disperse semiconducting SWCNTs rendering a selective removal of the metallic species in the solution. This selectivity is of paramount importance as it results in high-performance TFTs with both high on-state current (0.1 µA/µm @ channel length = 50 µm) and large on/off current ratio (103-105). The TFTs have also shown significantly improved uniformity and dimensional scalability with a mobility value of 10-20 cm2V-1s-1, which have allowed us to investigate the TFTs using the resultant logic circuits.

Place, publisher, year, edition, pages
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Engineering Science with specialization in Electronics
URN: urn:nbn:se:uu:diva-181987OAI: oai:DiVA.org:uu-181987DiVA: diva2:558210
Materials Research Society Spring Meeting 2012, San Francisco, April 9-13, 2012.
Available from: 2012-10-02 Created: 2012-10-02 Last updated: 2013-08-30
In thesis
1. Towards Solution Processed Electronic Circuits Using Carbon Nanotubes
Open this publication in new window or tab >>Towards Solution Processed Electronic Circuits Using Carbon Nanotubes
2013 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Emerging macro- and flexible electronic applications such as foldable displays, artificial skins, and smart textiles grow rapidly into the market. Solution-processed thin-film transistors (TFTs) based on single-walled carbon nanotubes (SWCNTs) as the semiconductor channel can offer high performance, low cost and versatility for macro- and flexible electronics. Major challenges to the development of SWCNT-based TFTs include: (i) hysteresis in their transfer characteristics (TCs), (ii) difficulties in simultaneous achievements of high on-state current Ion and large on/off current ratio Ion/Ioff, and (iii) poor uniformity and scalability resulting from the poor solution processability. This thesis aims at developing reliable and simple process techniques for fabrication of the SWCNT-based TFTs that possess the afore-stated characteristics. It presents a systematic investigation to not only explore the fundamental device physics, but also develop novel fabrication methods for enhancement of device performance.

First, issues related to the measurement of gate capacitance (Cg), the determination of current scalability, and the hysteresis in randomly networked SWCNTs are properly addressed. This leads to the establishment of a comprehensive methodology for extraction of carrier mobility (μ) for the SWCNT-based TFTs. In detail, the large hysteresis is effectively suppressed by adopting a pulsed drain current-gate voltage (Id-Vg) method in which the polarity of the gate pulse was alternating during the measurement. Different from most reported methods in the literature, Cg is accurately determined in our case by performing direct capacitance-voltage measurement on the TFTs.

Second, with the employment of functional composites comprising SWCNTs embedded in a semiconducting polymer, poly-9,9 dioctyl-fluorene-cobithiophene (F8T2), as the semiconducting channel via facile solution processes under ambient conditions, the fabricated TFTs exhibit outstanding electrical performance with: (i) negligible hysteresis, (ii) high μ, (iii) high Ion and large Ion/Ioff, (iv) excellent uniformity and dimensional scalability, and (v) good stability. These highly desired performance parameters are achieved owing to an ideal composite structure with metallic SWCNTs being selectively removed and the remaining semiconducting SWCNTs being well wrapped by the polymer matrix.

Finally, the developed TFTs basing on the SWCNT/F8T2 composite are used as the building block to construct some logic circuits. The resultant inverters, NANDs, and NORs are found to retain the small-hysteresis characteristics, with a cut-off frequency reaching 100 kHz. The results presented in this thesis advance the state-of-art SWCNT-based macroelectronics.

Place, publisher, year, edition, pages
Uppsala: Acta Universitatis Upsaliensis, 2013. 62 p.
Digital Comprehensive Summaries of Uppsala Dissertations from the Faculty of Science and Technology, ISSN 1651-6214 ; 1039
National Category
Engineering and Technology
urn:nbn:se:uu:diva-198280 (URN)978-91-554-8657-0 (ISBN)
Public defence
2013-05-30, Häggsalen, Ångström Laboratory, Lägerhyddsvägen 1, Uppsala, 13:15 (English)
Available from: 2013-05-08 Created: 2013-04-11 Last updated: 2013-08-30

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Liu, ZhiyingZhang, Shi-LiZhang, Zhi-Bin
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