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  • 1.
    Abermann, S.
    et al.
    Institute for Solid State Electronics, Vienna University of Technology.
    Efavi, J. K.
    Advanced Microelectronic Center, Aachen.
    Sjöblom, Gustaf
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Lemme, M. C.
    Advanced Microelectronic Center, Aachen.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Bertagnolli, E.
    Institute for Solid State Electronics, Vienna University of Technology.
    Processing and evaluation of metal gate/high-k/Si capacitors incorporating Al, Ni, TiN, and Mo as metal gate, and ZrO2 and HfO2 as high-k dielectric2007In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 84, no 5-8, p. 1635-1638Article in journal (Refereed)
    Abstract [en]

    We evaluate various metal gate/high-k/Si capacitors by their resulting electrical characteristics. Therefore, we process MOS gate stacks incorporating aluminium (Al), nickel (Ni), titanium-nitride (TiN), and molybdenum (Mo) as the gate material, and metal organic chemical vapour deposited (MOCVD) ZrO2 and HfO2 as the gate dielectric, respectively. The influence of the processing sequence - especially of the thermal annealing treatment - on the electrical characteristics of the various gate stacks is being investigated. Whereas post metallization annealing in forming gas atmosphere improves capacitance-voltage behaviour (due to reduced interface-, and oxide charge density), current-voltage characteristics degrade due to a higher leakage current after thermal treatment at higher temperatures. The Flatband-voltage values for the TiN-, Mo-, and Ni-capacitors indicate mid-gap pinning of the metal gates, however, Ni seems to be thermally unstable on ZrO2, at least within the process scheme we applied.

  • 2.
    Chen, Xi
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Zhang, Tao
    NanoBeam Limited, Cambridge CB1 3HD, England, United Kingdom.
    Constantoudis, Vassilios
    NCSR Demokritos, Inst Nanosci & Nanotechnol, Attiki, Greece;Nanometrisis PC, Attiki, Greece.
    Zhang, Shi-Li
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Zhang, Zhen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Aged hydrogen silsesquioxane for sub-10 nm line patterns2016In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 163, p. 105-109Article in journal (Refereed)
    Abstract [en]

    Hydrogen silsesquioxane (HSQ) has been used as a negative tone resist in electron beam lithography to define sub-10 nm patterns. The spontaneous polymerization in HSQ usually called aging in this context, sets a restricted period of time for a vendor-warranted use in patterning such small features with satisfactory line-edge roughness (LER). Here, we study the effect of HSQ aging on sensitivity and LER by focusing on exposing line patterns of 10 nm width in various structures. The results show that the 10 nm lines are easily achievable and the LER of the patterned lines remains unaltered even with HSQ that is stored 10 months beyond the vendor-specified expiration date. However, an increasingly pronounced decrease with time of the threshold electron dose (D-th), below which the line width would become less than 10 nm, is observed. After the HSQ expiration for 10 months, the 10 nm lines can be manufactured by reducing D-th to a level that is technically manageable with safe margins. In addition, the inclusion of a prebaldng step at 220 degrees C to accelerate the aging process results in a further reduced D-th for the 10 nm lines and thereby leads to a shortened writing time. The time variation of D-th with respect to the vendor-specified production date of HSQ is found to follow an exponential function of time and can be associated to the classical nucleation-growth polymerization process in HSQ.

  • 3.
    Edholm, Bengt
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Keskitalo, Niklas
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vestling, Lars
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Electrical investigation of the silicon/diamond interface1997In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 36, no 1-4, p. 245-248Article in journal (Refereed)
    Abstract [en]

    A new method for measuring the interface properties, using diamond terminated silicon p-n diodes, is used to quantify the electrical quality and to determine the conduction mechanism of the silicon/diamond interface for two types of diamond. It was found

  • 4.
    Edholm, Bengt
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Söderbärg, Anders
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Very High Current Gain Enhancement by Substrate Biasing of Lateral Bipolar Transistors on Thin SOI1993In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 22, no 1-4, p. 379-382Article in journal (Refereed)
  • 5.
    Ewert, Tony
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vestling, Lars
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Investigation of the electrical behavior of an asymmetric MOSFET2003In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 65, no 4, p. 428-438Article in journal (Refereed)
    Abstract [en]

    In this study a possible approach for improving breakdown voltage while maintaining fT for a MOSFET, is presented. In a conventional MOSFET process with LDD the S/D is implanted with a large tilt angle, which gives an asymmetry due to the shadowing effect by the gate. This asymmetry results in a longer drain-LDD region, which in combination with a lower LDD dose, could reduce the electrical field near the drain pinch-off region. A simulation study for different LDD doses and angles has been performed. It is shown that there exist an optimum range of LDD doses where the asymmetric device has higher figure-of-merit, concerning breakdown voltage and cut-off frequency, than the symmetric MOSFET structure.

  • 6.
    Fornell, Anna
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Materials Science and Engineering, Microsystems Technology. Uppsala University, Science for Life Laboratory, SciLifeLab.
    Liu, Zhenhua
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Materials Science and Engineering, Microsystems Technology. Uppsala University, Science for Life Laboratory, SciLifeLab.
    Tenje, Maria
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Materials Science and Engineering, Microsystems Technology. Uppsala University, Science for Life Laboratory, SciLifeLab.
    Optimisation of the droplet split design for high acoustic particle enrichment in droplet microfluidics2020In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 226Article in journal (Refereed)
  • 7.
    Godavarthi, Srinivas
    et al.
    IMEC.
    Le, Quoc Toan
    IMEC.
    Verdonck, Patrick
    IMEC.
    Mardani, Shabnam
    Imec, Kapeldreef, Leuven, Belgium.
    Vanstreels, Kris
    IMEC.
    Van Besien, Els
    IMEC.
    Baklanov, Mikhail R
    IMEC.
    Impact of wavelength of UV light and UV cure time on chemical and mechanical properties of PECVD deposited porous ultra low-k films2013In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 107, p. 134-137Article in journal (Refereed)
  • 8.
    Jafri, S Hassan M
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Applied Materials Sciences.
    Blom, Tobias
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Applied Materials Sciences.
    Wallner, Andreas
    Uppsala University, Disciplinary Domain of Science and Technology, Chemistry, Department of Biochemistry and Organic Chemistry.
    Welch, Ken
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Nanotechnology and Functional Materials.
    Strømme, Maria
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Nanotechnology and Functional Materials.
    Ottosson, Henrik
    Uppsala University, Disciplinary Domain of Science and Technology, Chemistry, Department of Biochemistry and Organic Chemistry.
    Leifer, Klaus
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Applied Materials Sciences.
    Control of junction resistances in molecular electronic devices fabricated by FIB2011In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 88, no 8, p. 2629-2631Article in journal (Refereed)
    Abstract [en]

    A major hurdle to realize molecular electronic devices (MEDs) is to make reliable electrical contacts to a single or a few molecules. Our nano-contact platform with a gap size of less than 25 nm with resistances above 1000 TΩ was built using combined techniques of photolithography, electron beam lithography and focused ion beam milling. In this study, we have used gold nanoparticles (AuNPs) to bridge the nanoelectrode gaps by dielectrophoretic trapping and thus obtain electrical contacts. The electrodes and/or the nanoparticles were functionalised with 1–2 nm long alkane-thiol molecules so that the electronic structure of these molecules determines the properties of the electrical junction. Molecules were introduced both by functionalising the nanogap and the nanoparticles and the results of both functionalisation protocols are compared. Here, we show the nanogap–nanoparticle bridge set-up containing metal–molecule junctions that can be used as a base for the development of molecular electronics containing only a few molecules under ambient conditions. Current–voltage (IV) characterization of alkanethiol/gold junction showed non-linear response where mean geometric resistance of four different junctions could be tuned from 20 GΩ to 20 TΩ. The results from the measurements on 1-alkanethiol in such devices is a first step to demonstrate that this platform has the potential to obtain stable electronic devices having relatively small numbers of molecules with reliable metal molecule junction by combing top-down and bottom-up approaches.

  • 9. Jogi, Indrek
    et al.
    Kukli, Kaupo
    Ritala, Mikko
    Leskela, Markku
    Aarik, Jaan
    Aidla, Aleks
    Lu, Jun
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Microstructure Laboratory.
    Atomic layer deposition of high capacitance density Ta2O5-ZrO2 based dielectrics for metal-insulator-metal structures2010In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 87, no 2, p. 144-149Article in journal (Refereed)
    Abstract [en]

    We have investigated electrical properties of laminated atomic layer deposited films: ZrO2-Ta2O5, ZrO2-Nb2O5-Ta2O5, ZrO2-TaxNb1-xO5 and Ta2O5-ZrxNbyOz. Even though the capacitances of laminates were often higher compared to films of constituent materials with similar thickness, considerably higher charge storage factors, Q were achieved only when tetragonal ZrO2 was stabilized in ZrO2-Ta2O5 laminate and when the laminate thickness exceeded 50 rim. The decreased Q values in the case of most laminates were the result of increased leakage currents. In the case of thinner films only Ta2O5-ZrxNbyOz, stack possessed capacitance density and Q value higher than reference HfO2. Concerning the conduction mechanisms, in the case of thinner films, the Ta2O5 or TaxNb1-xO5 apparently controlled the leakage either by Richardson-Schottky emission or Poole-Frenkel effect. (C) 2009 Elsevier B.V. All rights reserved

  • 10.
    Karlsson, Mikael
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Microsystems Technology.
    Vartiainen, I
    University of Joensuu, Finland.
    Kuittinen, M
    University of Joensuu, Finland.
    Nikolajeff, Fredrik
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Microsystems Technology.
    Fabrication of sub-micron high aspect ratio diamond structures with nanoimprint lithography2010In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 87, no 11, p. 2077-2080Article in journal (Refereed)
    Abstract [en]

    Polycrystalline diamond with optical quality has been patterned using nanoimprint lithography. Nanoimprint lithography is a rather new method for fabrication of resist structures with features sizes down to at least 20 nm. The pattern used in this article is a grating with a period of 600 nm and a fill factor of 0.5. Using plasma etching the nanoimprinted grating is etched into a freestanding diamond substrate. We have accomplished the fabrication of 300 nm diamond features with a depth of about 2 mu m, which corresponds to an aspect ratio of 7.

  • 11. Kukli, K.
    et al.
    Niinistö, J.
    Tamm, A.
    Lu, Jun
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Ritala, M.
    Leskelä, M.
    Putkonen, M.
    Niinistö, L.
    Song, F.
    Williams, P.
    Heys, P. N.
    Atomic layer deposition of ZrO2 and HfO2 on deep trenched and planar silicon2007In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 84, no 9-10, p. 2010-2013Article in journal (Refereed)
    Abstract [en]

    Conformal ZrO2 and HfO2 thin films were grown by atomic layer deposition using novel liquid cyclopentadienyl precursors at 300 degrees C or 350 degrees C on planar Si wafers and deep trenched Si with an aspect ratio of 60:1. The crystal growth and phase content in as-deposited films depended on the precursor, film thickness, and the material grown. The structural and electrical behaviour of the films were somewhat precursor-dependent, revealing better insulating properties in the films grown from oxygen-containing precursors. Also the HfO2 films showed lower leakage compared to ZrO2.

  • 12. Luo, Jun
    et al.
    Qiu, Zhi-Jun
    Deng, Jian
    Zhao, Chao
    Li, Junfeng
    Wang, Wenwu
    Chen, Dapeng
    Wu, Dongping
    Ostling, Mikael
    Ye, Tianchun
    Zhang, Shi-Li
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Effects of carbon pre-silicidation implant into Si substrate on NiSi2014In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 120, p. 178-181Article in journal (Refereed)
    Abstract [en]

    In this work, the effects of carbon pre-silicidation implant into Si(1 0 0) substrate on NiSi were investigated. NiSi films with carbon pre-silicidation implant to different doses were characterized by means of sheet resistance measurements, X-ray diffraction, scanning electron microscopy (SEM), planar view transmission electron microscopy (TEM) and second ion mass spectroscopy (SIMS). The presence of C is found to indeed significantly improve the thermal stability of NiSi as well as tends to change the preferred orientations of polycrystalline NiSi. The homogeneously distributed C at NiSi grain boundaries and C peak at NiSi/Si interface is ascribed to the improved thermal stability of NiSi. More importantly, the dose of carbon pre-silicidation implant also plays a key role in the formation of NiSi, which is suggested not to exceed a critical value about 5 x 10(15) cm(-2) in practical application in accordance with the results achieved in this work. (C) 2013 Elsevier B.V. All rights reserved.

  • 13. Luo, Jun
    et al.
    Qiu, Zhi-Jun
    Deng, Jian
    Zhao, Chao
    Li, Junfeng
    Wang, Wenwu
    Chen, Dapeng
    Wu, Dongping
    Ostling, Mikael
    Ye, Tianchun
    Zhang, Shi-Li
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Variation of Schottky barrier height induced by dopant segregation monitored by contact resistivity measurements2014In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 120, p. 174-177Article in journal (Refereed)
    Abstract [en]

    Change of contact resistivity (rho(c)) is monitored for evaluation of Schottky barrier height (SBH) variation induced by dopant segregation (DS). This method is particularly advantageous for metal-semiconductor contacts of small SBH, as it neither requires low-temperature measurement needed in current-voltage characterization of Schottky diodes nor is affected by reverse leakage current often troubling capacitance-voltage characterization. With PtSi contact to both n- and p-type diffusion regions, and the use of opposite or alike dopants implant into pre-formed PtSi films followed by drive-in anneal at different temperatures to induce DS at PtSi/Si interface, the formation of interfacial dipole is confirmed as the responsible cause for modification of effective SBHs thus the increase or decrease of rho(c). A tentative explanation for the change of contact resistivity based on interfacial dipole theory is provided in this work. Influences and interplay of interfacial dipole and space charge on effective SBH are also discussed. (C) 2013 Elsevier B.V. All rights reserved.

  • 14. Magnusson, U
    et al.
    Edholm, B
    Masszi, Ferenc
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    A lateral bipolar transistor concept on SOI using a self-aligned base definition technique1991In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 15, p. 341-344Article in journal (Refereed)
  • 15.
    Mardani, Shabnam
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Norström, Hans
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Smith, Ulf
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Zhang, Shi-Li
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Influence of tantalum/tantalum nitride barriers and caps on the high-temperature properties of copper metallization for wide-band gap applications2015In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 137, p. 37-42Article in journal (Refereed)
    Abstract [en]

    Electronic devices and circuits based on wide-band gap (WBG) semiconductors and intended for operation at temperatures significantly exceeding 300 degrees C are currently being developed. It is important that the adjunct metallization matches the high-temperature properties of the devices. In the case of the technologically important Cu metallization, the most frequently used cap and barrier layer materials are Ta, TaN and combinations of these. They stabilize the interconnects and prevent Cu from diffusing into the surrounding material. In this study, different combinations of Ta and TaN layers are evaluated electrically and morphologically after high-temperature treatments. The cap/Cu/barrier stack shows an appreciable increase in sheet resistance above 600 degrees C for the asymmetric combinations Ta/Cu/TaN and TaN/Cu/Ta. This degradation is shown to be closely related to a substantial diffusion of Ta across the Cu film and on to the TaN layer, where Ta1+xN forms. The symmetrical combinations Ta/Cu/Ta and TaN/Cu/TaN show only small changes in sheet resistance on even after anneals at 800 degrees C. A less pronounced Ta diffusion into the Cu film is found for the Ta/Cu/Ta combination. The experimental observations are interpreted in terms of Cu grain growth, Ta segregation in the Cu grain boundaries and morphological degradation of the Cu film.

  • 16.
    Mardani, Shabnam
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Primetzhofer, Daniel
    Uppsala University, Disciplinary Domain of Science and Technology, Physics, Department of Physics and Astronomy, Applied Nuclear Physics.
    Liljeholm, Lina
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vallin, Örjan
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Norström, Hans
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Electrical properties of Ag/Ta and Ag/TaN thin-films2014In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 120, p. 257-261Article in journal (Refereed)
    Abstract [en]

    Although wide band gap devices (WBG, e.g. GaN and SiC) are eminently suitable for high temperatures and harsh environments, these properties cannot be fully taken advantage of without an appropriate interconnect metallization. In this context, silver shows promise for interconnections at high temperatures. In this work, the thermal stability of Ag with two barrier metals – Ta and TaN – was therefore investigated. Metal stacks, consisting of 100 nm of silver on 45 nm of either Ta or TaN were sputter-deposited on the substrate. Each metal system was annealed in vacuum for one hour at temperatures up to 800 °C. Both systems showed stable performance up to 600 °C. The system with Ta as a barrier metal was found to be more stable than the TaN system. Above 700 °C, silver agglomeration led to degradation of electrical performance.

  • 17. Moreira, Milena
    et al.
    Doi, I.
    Souza, J. F.
    Diniz, J. A.
    Electrical characterization and morphological properties of AlN films prepared by dc reactive magnetron sputtering2011In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 88, no 5, p. 802-806Article in journal (Refereed)
  • 18. Rangelow, I. W.
    et al.
    Ivanov, Tzv.
    Ivanova, K.
    Volland, B. E.
    Grabiec, P.
    Sarov, Y.
    Persaud, A.
    Gotszalk, T.
    Zawierucha, P.
    Zielony, M.
    Dontzov, D.
    Schmidt, B.
    Zier, M.
    Nikolov, N.
    Kostic, I.
    Engl, W.
    Sulzbach, T.
    Mielczarski, J.
    Kolb, S.
    Latimier, Du P.
    Pedreau, R.
    Djakov, V.
    Huq, S. E.
    Edinger, K.
    Fortagne, O.
    Almansa, A.
    Blom, Hans-Olof
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Piezoresistive and self-actuated 128-cantilever arrays for nanotechnology applications2007In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 84, no 5-8, p. 1260-1264Article in journal (Refereed)
    Abstract [en]

    A major limitation for future nanotechnology, particularly for bottom-up manufacturing is the non-availability of 2-dimensional massively parallel probe arrays. Scanning proximity probes are uniquely powerful tools for analysis, manipulation and bottom-up synthesis: they are capable of addressing and engineering surfaces at the atomic level and are the key to unlocking the full potential of Nanotechnology. Generic massively parallel intelligent cantilever-probe platforms is demonstrated through a number of existing and ground-breaking techniques. A packaged VLSI NEMS-chip (Very Large Scale Integrated Nano Electro Mechanical System) incorporating 128 proximal probes, fully addressable with control and readout interconnects and advanced software will be presented.

  • 19.
    Seppänen, Henri
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Applied Materials Sciences.
    Kurppa, R.
    Meriläinen, A.
    Hæggström, E.
    Real time contact resistance measurement to determine when microwelds start to form during ultrasonic wire bonding2013In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 104, p. 114-119Article in journal (Refereed)
    Abstract [en]

    We prove that we can, using contact resistance as a tool, determine the instant when the bonding process starts, i.e. microwelds start to form during ultrasonic bonding. This knowledge permits us to reduce the uncertainty in the estimated bonded area by 5-18%. We proved our claim by combining a real-time contact resistance measurement, aborted ultrasound bonding, and classical SEM analysis of the bonded surfaces. We measured and analyzed, using a 4-wire Kelvin cross setup, the contact resistance of 25 μm by diameter AlSi(1%) wires bonded to a gold pad. The microweld area of 69 bonds was determined. We focused on inferring exactly when do the microwelds start to form. Post hoc analysis showed a linear correlation between the total microweld area and the time elapsed since the initial contact resistance drop. This work may help minimizing the sonication impact which may allow working with thin bond wires and fragile substrates.

  • 20.
    Seppänen, Henri
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Ångström Space Technology Centre, ÅSTC. Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Microsystems Technology.
    Kurppa, Risto
    University of Helsinki.
    Meriläinen, Antti
    University of Helsinki.
    Hæggström, Edward
    University of Helsinki.
    Real time contact resistance measurement to determine when microwelds start to form during ultrasonic wire bonding2013In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 104, p. 114-119Article in journal (Refereed)
    Abstract [en]

    We prove that we can, using contact resistance as a tool, determine the instant when the bonding process starts, i.e. microwelds start to form during ultrasonic bonding. This knowledge permits us to reduce the uncertainty in the estimated bonded area by 5–18%. We proved our claim by combining a real-time contact resistance measurement, aborted ultrasound bonding, and classical SEM analysis of the bonded surfaces. We measured and analyzed, using a 4-wire Kelvin cross setup, the contact resistance of 25 μm by diameter AlSi(1%) wires bonded to a gold pad. The microweld area of 69 bonds was determined. We focused on inferring exactly when do the microwelds start to form. Post hoc analysis showed a linear correlation between the total microweld area and the time elapsed since the initial contact resistance drop. This work may help minimizing the sonication impact which may allow working with thin bond wires and fragile substrates.

  • 21.
    Westlinder, Jörgen
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Sjöblom, Gustaf
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Variable work function in MOS capacitors utilizing nitrogen-controlled TiNx gate electrodes2004In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 75, no 4, p. 389-396Article in journal (Refereed)
    Abstract [en]

    A substantial shift in the work function of TiNx by as much as 0.7 eV is achieved by varying the nitrogen gas flow during the reactive sputter deposition of the metal gate, which indicates tunability for replacing poly-Si in a CMOS process. TiNx MOS capacitors having multiple SiO2 thicknesses have been evaluated and the work function of TiNx can be altered from 4.2 to 4.9 eV depending on the nitrogen content. The values are stable after RTP annealing up to 600 °C in nitrogen gas for 30 s, although annealing at 800 °C changes the work function for the different compositions towards a mid-gap value. No variation in EOT with annealing temperature is observed for the TiNx/SiO2 stacks deposited at high nitrogen gas flow. The change in work function appears not to be correlated to the crystalline orientation of the TiNx. The work function is instead believed to be affected by extrinsic states in the metal/dielectric interface.

  • 22.
    Zhang, Zhen
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Hellström, Per-Erik
    Lu, Jun
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Östling, Mikael
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Zhang, Shi-Li
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    A novel self-aligned process for platinum silicide nanowires2006In: Microelectronic Engineering, ISSN 0167-9317, E-ISSN 1873-5568, Vol. 83, no 11-12, p. 2107-2111Article in journal (Refereed)
    Abstract [en]

    Directly accessible, ultralong, uniform platinum silicide nanowires in PtSi and Pt2Si are mass-fabricated by combining a sidewall transfer lithography (STL) technology and a self-aligned silicide process. The STL technology is based on standard Si technology. The self-aligned platinum silicide (PtSix) process consists of two sequential steps in a single run: a silicidation step in N-2 to ensure a controllable silicide formation followed by an oxidation step in O-2 to form a reliable protective SiOx layer on top of the grown PtSix. The achieved nanowires are characterised by a low resistivity: 26 +/- 3 and 34 +/- 2 mu Omega cm for the Pt2Si- and PtSi-dominated nanowires.

1 - 22 of 22
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