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  • 1.
    Ankarcrona, Johan
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Eklund, Klas-Håkan
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vestling, Lars
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Simulation and modeling of the substrate contribution to the output resistance for RF-LDMOS power transistors2004In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 48, no 5, p. 789-797Article in journal (Refereed)
    Abstract [en]

    High frequency substrate losses for RF MOSFETs are analyzed using numerical device simulation. The results show that losses in devices made on low resistivity substrate occur through the substrate while losses in devices made on high resistivity substrate in the high frequency region occur along the surface through the device (source–drain). An equivalent circuit model is developed which accurately describes the off-state losses. Based on the model significant improvements in terms of output resistance are demonstrated, using an improved device on high resistivity substrate.

  • 2.
    Bengtsson, Olof
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vestling, Lars
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    A Computational Load-Pull Method with Harmonic Loading for High-Efficiency Investigations2009In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 53, no 1, p. 86-94Article in journal (Refereed)
    Abstract [en]

    In this paper a method for TCAD evaluation of RF-power transistors in high-efficiency operation using harmonic loading is presented. The method is based on large signal time-domain computational load-pull. Active loads are used in the harmonic load-pull for simulation time reduction. With the method device performance under different harmonic load impedance can be investigated at an early stage in the design process. Alternative designs can be compared and the mechanisms affecting device efficiency in class-F can be studied at chip-level. For method validation, a case study is made on an LDMOS transistor. The transistor is load-pulled in class-AB and then optimized for efficiency at 2f0 and 3f0 using a novel approach with passive fundamental load and active harmonic loads. A swept simulation is conducted using passive fundamental and harmonic loads. Waveforms in compression are analyzed and the mechanisms creating the increased efficiency in class-F are identified by a comparative study to class-AB. Class-F harmonic termination is shown to give a 17% overall reduction of dissipated power and a 9% increase in output power. The expected efficiency increase is about 3–10% in the compression region depending on level of compression.

  • 3.
    Bengtsson, Olof
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vestling, Lars
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Investigation of the non-linear input capacitance in LDMOS transistors and its contribution to IMD and phase distortion2008In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 52, no 7, p. 1024-1031Article in journal (Refereed)
    Abstract [en]

    In this paper the mechanisms causing the capacitive, reactive non-linearities in a lateral double diffused MOS, LDMOS, transistor are investigated. The non-linear input capacitance under load-line power match is extracted and analyzed. Computational TCAD load-pull is used to analyze the effect of non-linear capacitance on two-tone intermodulation distortion and AM–PM conversion in class-A operation. High-frequency measurements have been made to verify the use of 2D numerical device simulations for the analysis. It is found that the input capacitance, Cgg, of the LDMOS transistor working under power match conditions is a strongly non-linear function of gate voltage Vg but with an almost linear initial increase in Cgg. The voltage dependence of Cgg is found to mainly affect higher order IMD products in class-A operation. Transient simulations however show that Cgg seriously contributes to the onset of AM–PM conversion well below the 1 dB compression point.

  • 4. Bleichner, H
    et al.
    Bakowski, M
    Rosling, M
    Nordlander, E
    Vobecky, J
    Lundqvist, M
    Berg, Sören
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    A study of turn-off limitations and failur mechanisms in GTO thyristors by means of 2-D time-resolved optical measurements1992In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 35, no 11, p. 1683-1695Article in journal (Refereed)
  • 5. Bleichner, H
    et al.
    Nordlander, E
    Fiedler, G
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Flying-spot scanning for the separate mapping of resistivity and minority-cariier lifetime in silicon1986In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 29, no 8, p. 779-786Article in journal (Refereed)
  • 6. Bohlin, K
    et al.
    Nilsson, HT
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    A p-channel MESFET on silicon using erbium gate1985In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 28, no 9, p. 15-Article in journal (Refereed)
  • 7. de Sousa Pires, Jorge
    et al.
    Donoval, D
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    A new approach to the determination of MS-barrier heights from photoelectric data and/or an alternative way to determine the value of the Richardson constant1982In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 25, p. 989-Article in journal (Refereed)
  • 8. de Sousa Pires, Jorge
    et al.
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Donoval, D
    A self consistent approach to Fowler plots1984In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 27, p. 1029-1032Article in journal (Refereed)
  • 9. Donoval, D
    et al.
    de Sousa Pires, Jorge
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Harman, R
    A self consistent approach of IV measurements on rectifying metal-semiconductor contacts1989In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 32, no 11, p. 961-964Article in journal (Refereed)
  • 10. Elfsten, B
    et al.
    Norde, Herman
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Influence of metal sheet resistivity on the IV-characteristics of metal-semiconductor diodes1984In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 27, no 4, p. 317-Article in journal (Refereed)
  • 11. Elfsten, B
    et al.
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    CALCULATIONS OF CHARGE DISTRIBUTIONS AND MINORITY-CARRIER INJECTION RATIO FOR HIGH-BARRIER SCHOTTKY DIODES1985In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 28, no 7, p. 721-727Article in journal (Refereed)
  • 12.
    Farkas, Balazs
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Nyberg, Tomas
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Nanai, Laszlo
    Flexible Thin-Flm Transistors on Planarized Parylene Substrate with Recessed Individual Backgates2014In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 94, p. 11-14Article in journal (Refereed)
    Abstract [en]

    With novel design and fabrication techniques, InGaZnO-based thin-film transistors with individual recessed back-gates were fabricated on flexible and transparent polymer substrates. The key components for the fabrication include using a machine park optimized for Si process technology, low-adhesion, room temperature parylene coating, AlOx–ZnOx(Al)-based inorganic lift-off process, and a recessed individual gate concept. Transistors were built to validate the viability of the design as well as aforementioned techniques. The demonstrated approach could open up new design possibilities for cheap, flexible devices, while the recessed-gate concept shows promise towards the use of more brittle layers in our flexible thin-film electronic devices.

  • 13.
    Heinle, Ulrich
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vestling, Lars
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Modeling and characterization of capacitive coupling in trench-isolated structures on SOI substrates2004In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 48, no 1, p. 43-49Article in journal (Refereed)
  • 14. Janney, R
    et al.
    Hesselbom, H
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Computer calculations of the photresponse of a diffused silicon pn junction using the Gummel de Mari algorithm1978In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 21, p. 796-Article in journal (Refereed)
  • 15. Janney, RB
    et al.
    Seibt, W
    Norde, Herman
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Transient high level majority and minority carrier photocurrents in p-type silicon Schottky barrier diodes II: comparison with computer calculations1976In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 19, p. 645-Article in journal (Refereed)
  • 16. Larsson, T
    et al.
    Wennström, U
    Norström, H
    Blom, Hans-Olof
    Berg, Sören
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Engström, I
    Si/ti/TiB2/A1 structures investigated as contacts in microelectronic devices1989In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 32, no 5, p. 385-389Article in journal (Refereed)
  • 17.
    Li, Ling-Guang
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vallin, Örjan
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Lu, Jun
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Microstructure Laboratory.
    Smith, Ulf
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Norström, Hans
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Oxygen out-diffusion from buried layers in SOI and SiC-SOI substrates2010In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 54, no 2, p. 153-157Article in journal (Refereed)
    Abstract [en]

    We have made a comparative study of the oxygen out-diffusion process during heat treatment of SOI wafers and SiC-SOI hybrid substrates. SOI materials with three different thicknesses (2, 20 and 410 nm) of buried oxide (BOX) were used in the investigation High-resolution cross-sectional transmission electron microscopy (HRXTEM) together with laser interferometry was used to determine the remaining thickness of the BOX-layer after heat treatment. After complete removal of the BOX-layer of SOI wafers, the St/Si interface appears to be sharp and defect-free. Similar results were obtained for SiC-SOI hybrid substrates after removal of the entire buried oxide layer. For all combinations investigated oxide removal was accompanied by a thickness reduction and roughening of the silicon surface layer as verified by atomic force microscopy (AFM).

  • 18.
    Lotfi, Sara
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Li, Ling-Guang
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vallin, Örjan
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vestling, Lars
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Norström, Hans
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    LDMOS-transistors on semi-insulating silicon-on-polycrystalline-silicon carbide substrates for improved RF and thermal properties2012In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 70, p. 14-19Article in journal (Refereed)
    Abstract [en]

    SOI enables reduced capacitive coupling in RF power technology but the thick oxide causes thermal problems. In this paper, the authors present a new type of substrate, where the oxide insulator and the silicon substrate in SOI, are replaced by silicon carbide (SiC). SiC has higher thermal conductivity and is semi-insulating which can improve the thermal and RF performance. Here, LDMOS-transistors are processed and characterized on 150 mm silicon-on-polycrystalline-silicon carbide (Si-on-poly-SiC) substrates as well as on high power and RF optimized SOI reference substrates. The electrical performance for the Si-on-poly-SiC was improved or equal compared to the SOI reference and the device self-heating was reduced. The hybrid substrate had lower RF losses and the RF measurements on transistors were not ideal due to no isolation between the devices.

  • 19.
    Lotfi, Sara
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vestling, Lars
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    RF losses, crosstalk and temperature dependence for SOI and Si/SiC hybrid substrates2014In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 97, p. 59-65Article in journal (Refereed)
    Abstract [en]

    Single- and polycrystalline silicon carbide (6H-SiC/poly-SiC) substrates were investigated regarding RF losses and crosstalk for their use in Si/SiC hybrid substrates. Such hybrid substrates would be ideal for silicon high power and high frequency applications. To get a relevant comparison to SOI substrates, silicon substrates with varying resistivity were also included in the study. Regarding the crosstalk, both 6H-SiC and poly-SiC are capacitive across the whole frequency range, and the level of crosstalk is dependent on geometry and frequency. The low resistivity (LR) silicon substrate shows low crosstalk compared to medium and high resistivity (MR/HR) substrates, which both suffer from high crosstalk due to the substrate resistivity and dielectric relaxation effects in the GHz range. From 1-port measurements of RF losses it was observed that 6H-SiC by far has the lowest losses. The poly-SiC has low losses in the same range as the LR substrate while the MR substrate showed the highest losses. The 6H-SiC and LR silicon substrates were unaffected at higher temperatures, while at these conditions, HR silicon behaves more like MR silicon. Overall, the poly-SiC substrate has complex behavior with frequency dependent components, but still has the advantages necessary for successful realization of low loss Si/SiC hybrid substrates.

  • 20. Magnusson, U
    et al.
    Tirén, J
    Norde, Herman
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Bleichner, H
    Subthreshold behaviour of silicon MESFET's on SOS and bulk silicon substrates1989In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 32, no 11, p. 931-934Article in journal (Refereed)
  • 21.
    Norde, Herman
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Seibt, W
    On the initial value of transient photcurrents in silicon1974In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, no 17, p. 996-Article in journal (Refereed)
  • 22.
    Norde, Herman
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Seibt, W
    Janney, RB
    Transient high level majority and minority carrier photocurrents in p-type silicon Schottky barrier diodes II1976In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 19, p. 653-Article in journal (Refereed)
  • 23. Nylander, JO
    et al.
    Magnusson, U
    Rosling, M
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Influence of silicon-sapphire interface defects on SOS MESFET beavior1988In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 31, no 10, p. 1493-1496Article in journal (Refereed)
  • 24. Nylander, JO
    et al.
    Masszi, Ferenc
    Selberherr, S
    Berg, Sören
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Computer simulations of Schottky contacts with a non-constant recombination velocity1989In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 32, no 5, p. 363-367Article in journal (Refereed)
  • 25.
    Olsson, Jörgen
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Norde, Herman
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Magnusson, Ulf
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Investigation of the Current-Voltage Behavior of a Combined Schottky-p-n diode1992In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 35, no 9, p. 1229-1231Article in journal (Refereed)
  • 26.
    Olsson, Jörgen
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Vestling, Lars
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics. Comheat Microwave AB.
    Eklund, Klas-Håkan
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics. Comheat Microwave AB.
    A New Latch-Free LIGBT on SOI with Very High Current Density and Low Drive Voltage2016In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 115, p. 179-184Article in journal (Refereed)
    Abstract [en]

    A new latch-free LIGBT on SOI is presented. The new device combines advantages from both LDMOS as well as LIGBT technologies; high breakdown voltage, high drive current density, low control voltages, at the same time eliminating latch-up problems. The new LIGBT has the unique property of independent scaling of the input control device, i.e. LDMOS, and the output part of the device, i.e. the p-n-p part. This allows for additional freedom in designing and optimizing the device properties. Breakdown voltage of over 200 V, on-state current density over 3 A/mm, specific on-resistance below 190 mWmm2, and latch-free operation is demonstrated.

  • 27. Rodriguez, A
    et al.
    Misra, M
    Hesselbom, H
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Fabrication of short channel MOSFET:s with refractory metal gates using RF sputter etching1976In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 19, p. 17-Article in journal (Refereed)
  • 28. Rosling, M
    et al.
    Bleichner, H
    Lundqvist, M
    Nordlander, E
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    A novel technique for the simulataneous measurement of ambipolar carrier lifetime and diffusion coefficient in silicon1992In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 35, no 9, p. 1223-1227Article in journal (Refereed)
  • 29.
    Seibt, W
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Theory of transient photocurrents in totally depleted semiconductors1973In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 16, p. 1017-Article in journal (Refereed)
  • 30. Stolt, Lars
    et al.
    Bohlin, K
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Norde, Herman
    Schottky rectifiers on silicon using high barriers1982In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 26, no 4, p. 295-297Article in journal (Refereed)
  • 31. Söderbärg, A
    et al.
    Rosling, M
    Norde, Herman
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Determination of the mobility profile in silicon-on-sapphire material using the "FAT"FAT-principle1988In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 31, no 11, p. 1583-1585Article in journal (Refereed)
  • 32. Tarnay, K
    et al.
    Elfsten, B
    Masszi, Ferenc
    Tove, PA
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Parameter sensitivity analysis for computer modelling of metal-semiconductor junctions1986In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 29, no 6, p. 613-617Article in journal (Refereed)
  • 33. Tarnay, K
    et al.
    Poppe, A
    Verhas, P
    Kocsis, T
    Kohari, Z
    Masszi, Ferenc
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Micro-MOS - a first principle based 3D Monte Carlo simulation program for sub-half micron SI MOSFET:s1994In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405Article in journal (Refereed)
  • 34. Tirén, J
    et al.
    Magnusson, U
    Rosling, M
    Bleichner, H
    Berg, Sören
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    An improved silicon p-channel MESFET with a BF2 implanted thin channel and ErSi1 gate1989In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 32, no 11, p. 993-996Article in journal (Refereed)
  • 35. Tirén, J
    et al.
    Nylander, JO
    Norde, Herman
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    A fast approach for calculations of silicon MESFET characteristics from SUPREM doping profiles1989In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 32, no 9, p. 711-716Article in journal (Refereed)
  • 36.
    Tove, PA
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Ali, MP
    Correlation between Schottky electron and hole currents from a metal contact on chemically etched silicon1978In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 21, p. 919-Article in journal (Refereed)
  • 37.
    Tove, PA
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Andersson, LG
    Transient space charge limited current in light-pulse excited silicon1973In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 16, p. 961-Article in journal (Refereed)
  • 38.
    Tove, PA
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Hyder, SA
    Susila, C
    Diode characteristics and edge effects of metal semiconductor diodes1973In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 16, p. 513-Article in journal (Refereed)
  • 39.
    Tove, PA
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Susila, G
    Hyder, A
    Reverse diode characteristics of evaporated Au on n-silicon diodes1974In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 17, p. 411-Article in journal (Refereed)
  • 40.
    Vestling, Lars
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Bengtsson, Olof
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Eklund, Klas-Håkan
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Large-signal analysis of substrate effects in RF-power SOI-LDMOS transistors2010In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 54, no 2, p. 171-177Article in journal (Refereed)
    Abstract [en]

    Large-signal analysis of RF-power SOI-LDMOS transistors has been done on devices with different substrates resistivities. The effect of substrate resistivity on efficiency and output power has been investigated in class-AB operation and especially the loss mechanisms are studied. The large-signal performance is compared with the small-signal performance in an attempt to couple those parameters more tightly to each other. It is shown that the resistivity has great impact on the efficiency of the devices and the differences are related to losses in the substrate. The result verifies earlier indications that either a very high or very low substrate resistivity is beneficial to minimize the substrate losses. The study also shows interesting connections between the small-signal output resistance and capacitance and their large-signal counterparts derived from optimum load impedances.

  • 41.
    Vestling, Lars
    et al.
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Olsson, Jörgen
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Eklund, Klas-Håkan
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Drift Region Optimization of Lateral RESURF Devices2002In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 46, no 8, p. 1177-1184Article in journal (Refereed)
  • 42. von Haartman, M
    et al.
    Westlinder, J
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    Wu, D
    Malm, BG
    Hellström, P-E
    Olsson, J
    Östling, M
    Low-frequency noise and Coulomb scattering in Si0.8 Ge0.2 surface channel pMOSFET's with ALD Al2O3 gate dielectrics2005In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 49, p. 907-914Article in journal (Refereed)
  • 43. Wang, Peng-Fei
    et al.
    Liu, Lei
    Wu, Dongping
    Dept. of Microelectronics, Fudan University, Shanghai, China.
    Zang, Song-Gan
    Liu, Wei
    Gong, Yi
    Zhang, Wei
    Dept. of Microelectronics, Fudan University, Shanghai, China.
    Zhang, Shi-Li
    Uppsala University, Disciplinary Domain of Science and Technology, Technology, Department of Engineering Sciences, Solid State Electronics.
    A novel self-refreshable capacitorless DRAM cell and its extended applications2010In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 54, no 9, p. 985-990Article in journal (Refereed)
    Abstract [en]

    A novel DRAM cell based on floating junction gate (FJG) concept is investigated for its extended applications. Compared to the two-transistor floating gate DRAM cell, the new memory cell investigated in the present work has a much simpler configuration with only one transistor. Besides, its write speed is improved by introducing an integrated gated-diode so that state “1” can be self-refreshable. In this paper, the device configuration, the DRAM application feasibility, the self-refreshing ability, and the non-destructive read are explored. In addition, extended applications of the DRAM cell using the FJG concept will be discussed.

1 - 43 of 43
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