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  • 1.
    Berglund, Martin
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Palmer, Kristoffer
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Lotfi, Sara
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Kratz, Henrik
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Thornell, Greger
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Dynamic characterization and modelling of a dual-axis beam steering device for performance understanding, optimization, and control design2013Inngår i: Journal of Micromechanics and Microengineering, ISSN 0960-1317, E-ISSN 1361-6439, Vol. 23, nr 4, s. 045020-Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This paper presents a lumped thermal model of a dual-axis laser micromirror device for beam steering in a free-space optical (FSO) communication system, designed for fractionated spacecraft. An FSO communication system provides several advantages, such as larger bandwidth, smaller size and weight of the communication payload and less power consumption. A dual-axis mirror device is designed and realized using microelectromechanical systems technology. The fabrication is based on a double-sided, bulk micromachining process, where the mirror actuates thermally by joints consisting of v-grooves filled with the SU-8 polymer. The size of the device, consisting of a mirror, which is deflectable versus its frame in one direction, and through deflection of the frame in the other, is 15.4 × 10.4 × 0.3 mm3. In order to further characterize and understand the micromirror device, a Simulink state-space model of the actuator is set up using thermal and mechanical properties from a realized actuator. A deviation of less than 2% between the modelled and measured devices was obtained in an actuating temperature range of 20–200 °C. The model of the physical device was examined by evaluating its performance in vacuum, and by changing physical parameters, such as thickness and material composition. By this, design parameters were evaluated for performance gain and usability. For example, the crosstalk between the two actuators deflecting the mirror along its two axes in atmospheric pressure is projected to go down from 97% to 6% when changing the frame material from silicon to silicon dioxide. A feedback control system was also designed around the model in order to examine the possibility to make a robust control system for the physical device. In conclusion, the model of the actuator presented in this paper can be used for further understanding and development of the actuator system.

  • 2.
    Johansson, Ted
    et al.
    Linköping University.
    Bengtsson, Olof
    Ferdinand-Braun Institut.
    Lotfi, Sara
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vestling, Lars
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Norström, Hans
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Nyström, Christian
    A +32.8 dBm LDMOS power amplifier for WLAN in 65 nm CMOS technology2013Inngår i: 2013 8th European Microwave Integrated Circuits Conference Proceedings, 2013, s. 53-56Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Generating high output power at radio frequencies in CMOS becomes more challenging as technology is scaled. Limitations mainly come from device design. We demonstrate the feasibility of an 10 V LDMOS device fabricated in 65 nm foundry CMOS technology with no added process steps or mask. DC, RF, and power characterization are presented which show the feasibility of the device. The LDMOS device is used in an integrated WLAN-PA design and 32.8 dBm linear output power in the 2.45 GHz band is achieved. Load-pull data also shows high output power capability at 5.8 GHz. The concept can also be used at 45 nm and 28 nm nodes in most foundry CMOS processes.

  • 3.
    Li, Ling-Guang
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Lotfi, Sara
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vallin, Örjan
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Thermal characterization of polycrystalline SiC2014Inngår i: Journal of Electronic Materials, ISSN 0361-5235, E-ISSN 1543-186X, Vol. 43, nr 4, s. 1150-1153Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    A study is made using fabricated thermal resistors in combination with two-dimensional (2D) electrothermal simulations to determine the thermal conductivity of polycrystalline SiC, single-crystalline SiC, and Si. The results show that the poly-SiC substrate has thermal conductivity of κ poly-SiC = 2.7 W K−1 cm−1, which is significantly lower than that of single-crystalline SiC.

  • 4.
    Lotfi, Sara
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Design and Characterization of RF-LDMOS Transistors and Si-on-SiC Hybrid Substrates2014Doktoravhandling, med artikler (Annet vitenskapelig)
    Abstract [en]

    With increasing amount of user data and applications in wireless communication technology, demands are growing on performance and fabrication costs. One way to decrease cost is to integrate the building blocks in an RF system where digital blocks and high power amplifiers then are combined on one chip. This thesis presents LDMOS transistors integrated in a 65 nm CMOS process without adding extra process steps or masks. High power performance of the LDMOS is demonstrated for an integrated WLAN-PA design at 2.45 GHz with 32.8 dBm output power and measurements also showed that high output power is achievable at 5.8 GHz. For the first time, this kind of device is moreover demonstrated at X-band with over 300 mW/mm output power, targeting communication and radar systems at 8 GHz. As SOI is increasing in popularity due to better device performance and RF benefits, the buried oxide can cause thermal problems, especially for high power devices. To deal with self-heating effects and decrease the RF substrate losses further, this thesis presents a hybrid substrate consisting of silicon on top of polycrystalline silicon carbide (Si-on-poly-SiC). This hybrid substrate utilizes the high thermal conductivity of poly-SiC to reduce device self-heating and the semi-insulating properties to reduce RF losses. Hybrid substrates were successfully fabricated for the first time in 150 mm wafer size by wafer bonding and evaluation was performed in terms of both electrical and thermal measurements and compared to a SOI reference. Successful LDMOS transistors were fabricated for the first time on this type of hybrid substrate where no degradation in electrical performance was seen comparing the LDMOS to identical transistors on the SOI reference. Measurements on calibrated resistors showed that the thermal conductivity was 2.5 times better for the hybrid substrate compared to the SOI substrate. Moreover, RF performance of the hybrid substrate was investigated and the semi-insulating property of poly-SiC showed to be beneficial in achieving a high equivalent substrate parallel resistance and thereby low substrate losses. In a transistor this would be equal to better efficiency and output power. In terms of integration, the hybrid substrate also opens up the possibility of heterogeneous integration where silicon devices and GaN devices can be fabricated on the same chip.

    Delarbeid
    1. A +32.8 dBm LDMOS power amplifier for WLAN in 65 nm CMOS technology
    Åpne denne publikasjonen i ny fane eller vindu >>A +32.8 dBm LDMOS power amplifier for WLAN in 65 nm CMOS technology
    Vise andre…
    2013 (engelsk)Inngår i: 2013 8th European Microwave Integrated Circuits Conference Proceedings, 2013, s. 53-56Konferansepaper, Oral presentation with published abstract (Fagfellevurdert)
    Abstract [en]

    Generating high output power at radio frequencies in CMOS becomes more challenging as technology is scaled. Limitations mainly come from device design. We demonstrate the feasibility of an 10 V LDMOS device fabricated in 65 nm foundry CMOS technology with no added process steps or mask. DC, RF, and power characterization are presented which show the feasibility of the device. The LDMOS device is used in an integrated WLAN-PA design and 32.8 dBm linear output power in the 2.45 GHz band is achieved. Load-pull data also shows high output power capability at 5.8 GHz. The concept can also be used at 45 nm and 28 nm nodes in most foundry CMOS processes.

    HSV kategori
    Forskningsprogram
    Teknisk fysik med inriktning mot elektronik
    Identifikatorer
    urn:nbn:se:uu:diva-209603 (URN)978-2-87487-032-3 (ISBN)
    Konferanse
    European Microwave Integrated Circuits Conference (EuMIC)
    Tilgjengelig fra: 2013-10-22 Laget: 2013-10-22 Sist oppdatert: 2014-02-10bibliografisk kontrollert
    2. Power Performance of 65 nm CMOS Integrated LDMOS Transistors at WLAN and X-band Frequencies
    Åpne denne publikasjonen i ny fane eller vindu >>Power Performance of 65 nm CMOS Integrated LDMOS Transistors at WLAN and X-band Frequencies
    2016 (engelsk)Inngår i: International journal of microwave and wireless technologies, ISSN 1759-0795, E-ISSN 1759-0787, Vol. 8, nr 2, s. 135-141Artikkel i tidsskrift (Fagfellevurdert) Published
    Abstract [en]

    Laterally diffused metal oxide semiconductor (LDMOS) transistors with 10V breakdown voltage have been implemented in a 65nm Complementary metal oxide semiconductor (CMOS) process without extra masks or process steps. Radio frequency (RF) performance for Wireless local area network (WLAN) frequencies and in X-band at 8GHz is investigated by load-pull measurements in class AB operation for both 3.3 and 5V supply voltage. Results at 2.45GHz showed 290mW/mm output power density with 17dB linear gain and over 45% power added efficiency (PAE) at 4dB compression at a supply voltage of 5V. Furthermore, results in X-band at 8GHz show 8dB linear gain, 320mW/mm output power density and over 22% PAE at 4dB compression. Third-order intermodulation measurements at 8GHz revealed OIP3 of 18.9 and 21.9dBm at 3.3 and 5V, respectively. The transistors were also tested for reliability which showed no drift in quiescent current after 26h of DC stress while high-power RF stress showed only small extrapolated drift at 10 years in output power density. This is to the authors' knowledge the first time high output power density in X-band is demonstrated for integrated LDMOS transistors manufactured in a 65nm CMOS process without extra process steps.

    HSV kategori
    Forskningsprogram
    Teknisk fysik med inriktning mot elektronik
    Identifikatorer
    urn:nbn:se:uu:diva-215334 (URN)10.1017/S1759078714001603 (DOI)000370689000002 ()
    Tilgjengelig fra: 2014-01-13 Laget: 2014-01-13 Sist oppdatert: 2017-12-06bibliografisk kontrollert
    3. Investigating reliability and stress mechanisms of DC and large-signal stressed CMOS 65-nm RF-LDMOS by gate current characterization
    Åpne denne publikasjonen i ny fane eller vindu >>Investigating reliability and stress mechanisms of DC and large-signal stressed CMOS 65-nm RF-LDMOS by gate current characterization
    2015 (engelsk)Inngår i: IEEE transactions on device and materials reliability, ISSN 1530-4388, E-ISSN 1558-2574, Vol. 15, nr 2, s. 191-197Artikkel i tidsskrift (Fagfellevurdert) Published
    Abstract [en]

    This paper presents reliability measurements under DC and large-signal conditions of an LDMOS transistor integrated in a 65 nm CMOS process. The gate current was measured with high resolution across the whole operation area with an atto-sense unit, and distinct behavior was seen in the gate current characteristics due to hot-carrier injection (HCI) and Fowler-Nordheim (FN) tunneling. Several bias points were chosen for DC stress of the transistor and degradation of important parameters in terms of RF operation were studied. Furthermore, the behavior from DC stress was compared to large-signal stress of the device in class AB where output power was monitored. Results show that operation at a supply voltage of 3.3 V shows no significant drift of transistor parameters while operation at 5 V shows increase in on-resistance but no changes in quiescent current or threshold voltage. These results are in coherence with what DC stress at quiescent bias points for class AB showed and may imply that DC stress measurements are sufficient in order to understand transistor reliability during RF operation.

    HSV kategori
    Forskningsprogram
    Teknisk fysik med inriktning mot elektronik
    Identifikatorer
    urn:nbn:se:uu:diva-215335 (URN)10.1109/TDMR.2015.2413845 (DOI)000356174400009 ()
    Tilgjengelig fra: 2014-01-13 Laget: 2014-01-13 Sist oppdatert: 2017-12-06bibliografisk kontrollert
    4. Fabrication and Characterization of 150 mm Silicon-on-polycrystalline-Silicon Carbide Substrates
    Åpne denne publikasjonen i ny fane eller vindu >>Fabrication and Characterization of 150 mm Silicon-on-polycrystalline-Silicon Carbide Substrates
    Vise andre…
    2012 (engelsk)Inngår i: Journal of Electronic Materials, ISSN 0361-5235, E-ISSN 1543-186X, Vol. 41, nr 3, s. 480-487Artikkel i tidsskrift (Fagfellevurdert) Published
    Abstract [en]

    Silicon-on-insulator (SOI) substrates can reduce RF-substrate losses due to their buried oxide (BOX). On the other hand, the BOX causes problems since it acts as a thermal barrier. Oxide has low thermal conductivity and traps the heat that is generated in devices on the SOI. This paper presents a hybrid substrate which uses a thin layer of poly-crystalline silicon and poly-crystalline silicon carbide (Si-on-poly-SiC) to replace the thermally unfavorable buried oxide and the silicon substrate. 150 mm substrates were fabricated by wafer bonding and shown to be stress and strain free. Various electronic devices and test structures were processed on the hybrid substrate as well as on a low resistivity SOI reference wafer. The substrates were characterized electrically and thermally and compared to each other. Results showed that the Si-on-poly-SiC wafer had a 2.5 times lower thermal resistance and was equally or better in electrical performance compared to the SOI reference wafer.

    HSV kategori
    Forskningsprogram
    Teknisk fysik med inriktning mot elektronik
    Identifikatorer
    urn:nbn:se:uu:diva-162180 (URN)10.1007/s11664-011-1827-2 (DOI)000299930100009 ()
    Tilgjengelig fra: 2011-12-12 Laget: 2011-11-25 Sist oppdatert: 2017-12-08bibliografisk kontrollert
    5. LDMOS-transistors on semi-insulating silicon-on-polycrystalline-silicon carbide substrates for improved RF and thermal properties
    Åpne denne publikasjonen i ny fane eller vindu >>LDMOS-transistors on semi-insulating silicon-on-polycrystalline-silicon carbide substrates for improved RF and thermal properties
    Vise andre…
    2012 (engelsk)Inngår i: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 70, s. 14-19Artikkel i tidsskrift (Fagfellevurdert) Published
    Abstract [en]

    SOI enables reduced capacitive coupling in RF power technology but the thick oxide causes thermal problems. In this paper, the authors present a new type of substrate, where the oxide insulator and the silicon substrate in SOI, are replaced by silicon carbide (SiC). SiC has higher thermal conductivity and is semi-insulating which can improve the thermal and RF performance. Here, LDMOS-transistors are processed and characterized on 150 mm silicon-on-polycrystalline-silicon carbide (Si-on-poly-SiC) substrates as well as on high power and RF optimized SOI reference substrates. The electrical performance for the Si-on-poly-SiC was improved or equal compared to the SOI reference and the device self-heating was reduced. The hybrid substrate had lower RF losses and the RF measurements on transistors were not ideal due to no isolation between the devices.

    HSV kategori
    Forskningsprogram
    Teknisk fysik med inriktning mot elektronik
    Identifikatorer
    urn:nbn:se:uu:diva-162179 (URN)10.1016/j.sse.2011.11.019 (DOI)000302494500004 ()
    Konferanse
    EUROSOI 2011 Conference, 17-19 January 2011, Granada Andalucia.
    Tilgjengelig fra: 2011-12-08 Laget: 2011-11-25 Sist oppdatert: 2017-12-08bibliografisk kontrollert
    6. RF losses, crosstalk and temperature dependence for SOI and Si/SiC hybrid substrates
    Åpne denne publikasjonen i ny fane eller vindu >>RF losses, crosstalk and temperature dependence for SOI and Si/SiC hybrid substrates
    2014 (engelsk)Inngår i: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 97, s. 59-65Artikkel i tidsskrift (Fagfellevurdert) Published
    Abstract [en]

    Single- and polycrystalline silicon carbide (6H-SiC/poly-SiC) substrates were investigated regarding RF losses and crosstalk for their use in Si/SiC hybrid substrates. Such hybrid substrates would be ideal for silicon high power and high frequency applications. To get a relevant comparison to SOI substrates, silicon substrates with varying resistivity were also included in the study. Regarding the crosstalk, both 6H-SiC and poly-SiC are capacitive across the whole frequency range, and the level of crosstalk is dependent on geometry and frequency. The low resistivity (LR) silicon substrate shows low crosstalk compared to medium and high resistivity (MR/HR) substrates, which both suffer from high crosstalk due to the substrate resistivity and dielectric relaxation effects in the GHz range. From 1-port measurements of RF losses it was observed that 6H-SiC by far has the lowest losses. The poly-SiC has low losses in the same range as the LR substrate while the MR substrate showed the highest losses. The 6H-SiC and LR silicon substrates were unaffected at higher temperatures, while at these conditions, HR silicon behaves more like MR silicon. Overall, the poly-SiC substrate has complex behavior with frequency dependent components, but still has the advantages necessary for successful realization of low loss Si/SiC hybrid substrates.

    HSV kategori
    Forskningsprogram
    Teknisk fysik med inriktning mot elektronik
    Identifikatorer
    urn:nbn:se:uu:diva-210617 (URN)10.1016/j.sse.2014.04.030 (DOI)000337873200010 ()
    Tilgjengelig fra: 2013-11-12 Laget: 2013-11-12 Sist oppdatert: 2017-12-06bibliografisk kontrollert
  • 5.
    Lotfi, Sara
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Bengtsson, Olof
    Ferdinand-Braun Institut.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Power Performance of 65 nm CMOS Integrated LDMOS Transistors at WLAN and X-band Frequencies2016Inngår i: International journal of microwave and wireless technologies, ISSN 1759-0795, E-ISSN 1759-0787, Vol. 8, nr 2, s. 135-141Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Laterally diffused metal oxide semiconductor (LDMOS) transistors with 10V breakdown voltage have been implemented in a 65nm Complementary metal oxide semiconductor (CMOS) process without extra masks or process steps. Radio frequency (RF) performance for Wireless local area network (WLAN) frequencies and in X-band at 8GHz is investigated by load-pull measurements in class AB operation for both 3.3 and 5V supply voltage. Results at 2.45GHz showed 290mW/mm output power density with 17dB linear gain and over 45% power added efficiency (PAE) at 4dB compression at a supply voltage of 5V. Furthermore, results in X-band at 8GHz show 8dB linear gain, 320mW/mm output power density and over 22% PAE at 4dB compression. Third-order intermodulation measurements at 8GHz revealed OIP3 of 18.9 and 21.9dBm at 3.3 and 5V, respectively. The transistors were also tested for reliability which showed no drift in quiescent current after 26h of DC stress while high-power RF stress showed only small extrapolated drift at 10 years in output power density. This is to the authors' knowledge the first time high output power density in X-band is demonstrated for integrated LDMOS transistors manufactured in a 65nm CMOS process without extra process steps.

  • 6.
    Lotfi, Sara
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Li, Ling-Guang
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vallin, Örjan
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Norström, Hans
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Fabrication and Characterization of 150 mm Silicon-on-polycrystalline-Silicon Carbide Substrates2012Inngår i: Journal of Electronic Materials, ISSN 0361-5235, E-ISSN 1543-186X, Vol. 41, nr 3, s. 480-487Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Silicon-on-insulator (SOI) substrates can reduce RF-substrate losses due to their buried oxide (BOX). On the other hand, the BOX causes problems since it acts as a thermal barrier. Oxide has low thermal conductivity and traps the heat that is generated in devices on the SOI. This paper presents a hybrid substrate which uses a thin layer of poly-crystalline silicon and poly-crystalline silicon carbide (Si-on-poly-SiC) to replace the thermally unfavorable buried oxide and the silicon substrate. 150 mm substrates were fabricated by wafer bonding and shown to be stress and strain free. Various electronic devices and test structures were processed on the hybrid substrate as well as on a low resistivity SOI reference wafer. The substrates were characterized electrically and thermally and compared to each other. Results showed that the Si-on-poly-SiC wafer had a 2.5 times lower thermal resistance and was equally or better in electrical performance compared to the SOI reference wafer.

  • 7.
    Lotfi, Sara
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Li, Ling-Guang
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vallin, Örjan
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Norström, Hans
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Mobility Profiles and Thermal Characterization of SOI and Si-on-SiC hybrid substrates2011Inngår i: 2011 IEEE International SOI Conference Proceedings, 2011Konferansepaper (Fagfellevurdert)
    Abstract [en]

    This paper presents new results revealing the electrical properties of the silicon-on-polycrystalline silicon carbide hybrid substrate. The thermal resistance in the substrate was measured and compared to simulations and is linked to the measured reduced self-heating in LDMOS transistors. The mobility in the device layer was extracted and shows slightly lower values in the hybrid compared to the SOI. Furthermore, the gate oxide integrity was evaluated suggesting that the poly-Si layer in the Si/SiC hybrid may act as a gettering layer for impurities due to the lower QBD spread.

  • 8.
    Lotfi, Sara
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Li, Ling-Guang
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vallin, Örjan
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vestling, Lars
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Norström, Hans
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    LDMOS-transistors on semi-insulating silicon-on-polycrystalline-silicon carbide substrates for improved RF and thermal properties2012Inngår i: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 70, s. 14-19Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    SOI enables reduced capacitive coupling in RF power technology but the thick oxide causes thermal problems. In this paper, the authors present a new type of substrate, where the oxide insulator and the silicon substrate in SOI, are replaced by silicon carbide (SiC). SiC has higher thermal conductivity and is semi-insulating which can improve the thermal and RF performance. Here, LDMOS-transistors are processed and characterized on 150 mm silicon-on-polycrystalline-silicon carbide (Si-on-poly-SiC) substrates as well as on high power and RF optimized SOI reference substrates. The electrical performance for the Si-on-poly-SiC was improved or equal compared to the SOI reference and the device self-heating was reduced. The hybrid substrate had lower RF losses and the RF measurements on transistors were not ideal due to no isolation between the devices.

  • 9.
    Lotfi, Sara
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Investigating reliability and stress mechanisms of DC and large-signal stressed CMOS 65-nm RF-LDMOS by gate current characterization2015Inngår i: IEEE transactions on device and materials reliability, ISSN 1530-4388, E-ISSN 1558-2574, Vol. 15, nr 2, s. 191-197Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    This paper presents reliability measurements under DC and large-signal conditions of an LDMOS transistor integrated in a 65 nm CMOS process. The gate current was measured with high resolution across the whole operation area with an atto-sense unit, and distinct behavior was seen in the gate current characteristics due to hot-carrier injection (HCI) and Fowler-Nordheim (FN) tunneling. Several bias points were chosen for DC stress of the transistor and degradation of important parameters in terms of RF operation were studied. Furthermore, the behavior from DC stress was compared to large-signal stress of the device in class AB where output power was monitored. Results show that operation at a supply voltage of 3.3 V shows no significant drift of transistor parameters while operation at 5 V shows increase in on-resistance but no changes in quiescent current or threshold voltage. These results are in coherence with what DC stress at quiescent bias points for class AB showed and may imply that DC stress measurements are sufficient in order to understand transistor reliability during RF operation.

  • 10.
    Lotfi, Sara
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Palmer, Kristoffer
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Kratz, Henrik
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Thornell, Greger
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Hybrid microtransmitter for free-space optical spacecraft communication: design, manufacturing, and characterization2009Inngår i: Proc. SPIEPhotonics West, MOEMS and Miniaturized Systems VIII, Jan 24-29, San Jose, CA, 2009, s. 72080N-12-Konferansepaper (Annet vitenskapelig)
    Abstract [en]

    Opticalintra-communication links are investigated by several currently operational qualification missions.Compared with RF communication systems, the optical domain obtains awider bandwidth, enables miniaturized spacecraft and reduced power consumption. Inthis project, a microtransmitter is designed and manufactured for formationflying spacecraft with transmission rates of 1 Gbit/s. Simulations inMatlab and Simulink show that a BER of 10-9 canbe achieved with aperture sizes of 1 cm and atransmitter output peak power of 12 mW for a distanceof 10 km. The results show that the performance ofthe communication link decreases due to mechanical vibrations in thespacecraft together with a narrow laser beam. A dual-axis microactuatordesigned as a deflectable mirror has been developed for thelaser beam steering where the fabrication is based on adouble-sided, bulk micromachining process. The mirror actuates by joints consistingof v-grooves filled with SU-8 polymer. The deflection is controlledby integrated resistive heaters in the joints causing the polymerto expand thermally. Results show that the mirror actuates 20-30°in the temperature interval 25-250°C. Flat Fresnel lenses made ofPyrex 7740 are used to collimate the laser beam. Theselenses are simulated in the Comsol software and optimized fora 670 nm red VCSEL. The lenses are manufactured usinglithography and reactive ion etching. All tests are made ina normal laboratory environment, but the effect of the spaceenvironment is discussed

  • 11.
    Lotfi, Sara
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vallin, Örjan
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Li, Ling-Guang
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vestling, Lars
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Norström, Hans
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Electrical and Thermal Characterization of 150 mm Silicon–on–polycrystalline-Silicon Carbide Hybrid Substrates2010Inngår i: 2010 IEEE International SOI Conference Proceedings, Oct 11-14, San Diego CA, 2010, s. 115-116Konferansepaper (Fagfellevurdert)
    Abstract [en]

    150 mm Silicon–on–polycrystalline-Silicon Carbide (poly-SiC) hybrid substrates, without intermediate oxide layers have been realized by hydrophilic wafer bonding of SOI- and poly-SiC wafers. A novel rapid thermal treatment step has been introduced before furnace annealing to avoid bubble formation, cracks and breakage. The final substrates are shown to be stress free. Electrical and thermal characterization of devices manufactured on the substrate using a MOS process show excellent performance.

  • 12.
    Lotfi, Sara
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vallin, Örjan
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Li, Ling-Guang
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vestling, Lars
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Norström, Hans
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    LDMOS transistors on 150 mm silicon-on-polycrystalline-silicon carbide hybrid substrates2011Inngår i: Proc. of EUROSOI 2011 workshop: VII workshop of the thematic network on silicon on insulator technology, devices and circuits, Jan 17-19, Granada, Spain, 2011, s. 153-154Konferansepaper (Fagfellevurdert)
    Abstract [en]

    Silicon based RF and power devices need a substrate that conducts heat better than conventional SOI-substrates. Here, the silicon dioxide insulator and the silicon substrate as in a SOI-wafer, are replaced by silicon carbide (SiC) which has higher thermal conductivity and is semi-insulating. Successful LDMOS-transistors were processed on the 150 mm Silicon-on-polycrystalline-Silicon carbide (Si-on-poly-SiC) substrates with improved or equal electrical performance compared to a RF-optimized SOI substrate.

  • 13.
    Lotfi, Sara
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vestling, Lars
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    RF losses, crosstalk and temperature dependence for SOI and Si/SiC hybrid substrates2013Inngår i: Proceedings of EUROSOI2013, 2013Konferansepaper (Fagfellevurdert)
  • 14.
    Lotfi, Sara
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Vestling, Lars
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Olsson, Jörgen
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    RF losses, crosstalk and temperature dependence for SOI and Si/SiC hybrid substrates2014Inngår i: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 97, s. 59-65Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    Single- and polycrystalline silicon carbide (6H-SiC/poly-SiC) substrates were investigated regarding RF losses and crosstalk for their use in Si/SiC hybrid substrates. Such hybrid substrates would be ideal for silicon high power and high frequency applications. To get a relevant comparison to SOI substrates, silicon substrates with varying resistivity were also included in the study. Regarding the crosstalk, both 6H-SiC and poly-SiC are capacitive across the whole frequency range, and the level of crosstalk is dependent on geometry and frequency. The low resistivity (LR) silicon substrate shows low crosstalk compared to medium and high resistivity (MR/HR) substrates, which both suffer from high crosstalk due to the substrate resistivity and dielectric relaxation effects in the GHz range. From 1-port measurements of RF losses it was observed that 6H-SiC by far has the lowest losses. The poly-SiC has low losses in the same range as the LR substrate while the MR substrate showed the highest losses. The 6H-SiC and LR silicon substrates were unaffected at higher temperatures, while at these conditions, HR silicon behaves more like MR silicon. Overall, the poly-SiC substrate has complex behavior with frequency dependent components, but still has the advantages necessary for successful realization of low loss Si/SiC hybrid substrates.

  • 15.
    Olsson, Jörgen
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Lotfi, Sara
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Self-heating and scaling effects of multi-finger LDMOS transistors on SOI and Si-on-SiC hybrid substrates with diamond heat-spreading layer2012Inngår i: Proc. of EUROSOI 2012 workshop: VIII workshop on silicon on insulator technology, devices and circuits, Jan 23-25, Montpellier, France, 2012, s. 31-32Konferansepaper (Fagfellevurdert)
    Abstract [en]

    An extensive simulation study of self-heating effects inSOI and Silicon-on-SiC hybrid substrates is presented.2D electrothermal device simulations of multi-finger RFpowerLDMOS-transistors on the different substrates arecarried out in order to study the self-heating and scalingeffects. Introduction of a thin diamond layer between thesilicon device layer and the substrate is shown tosignificantly improve the thermal performance andscaling under certain conditions, and points out theimportance of good lateral heat conduction.

  • 16.
    Olsson, Jörgen
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Lotfi, Sara
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Fasta tillståndets elektronik.
    Bengtsson, Olof
    Ferdinand-Braun Institut,Leibniz-Institut fuer Hoechstfrequenztechnik, Berlin, Germany.
    LDMOS with over 0.3 W/mm output power at 8 GHz integrated in 65nm CMOS2014Inngår i: Proceedings of GigaHertz Symposium, 2014, s. 73-Konferansepaper (Fagfellevurdert)
  • 17.
    Palmer, Kristoffer
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Lotfi, Sara
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Berglund, Martin
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Thornell, Greger
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    Kratz, Henrik
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrosystemteknik.
    A micromachined dual-axis beam steering actuator for use in a miniaturized optical space communication system2010Inngår i: Journal of Micromechanics and Microengineering, ISSN 0960-1317, E-ISSN 1361-6439, Vol. 20, nr 10, s. 105007-Artikkel i tidsskrift (Fagfellevurdert)
    Abstract [en]

    The design, fabrication and evaluation of an electrothermally actuated micromachined beam steering device for use in a free-space optical communication system intended for use on micro-and nanospacecraft in kilometer-sized formations are presented. SU-8 confined in v-grooves is heated to create bending movement in two orthogonal directions for two-axial steering with large static bending angles and low actuation voltages. Standard MEMS processing is used to fabricate the devices with square mirror side lengths of 1, 3.5 and 5 mm. In addition, a method to prevent thermal damage to SU-8 during deep reactive ion etching has been successfully developed. Characterization shows optical scan ranges larger than 40 degrees in both directions with the maximum driving voltage of 16 V corresponding to a total power consumption of 1.14 W. Infrared imaging is used to investigate thermal cross-talk between actuators for the two scanning directions. It is found that a silicon backbone on the joint backside is crucial for device performance. Differences from expected performance are believed to arise from the SU-8 curing process and excessive heating during fabrication. A finite element method simulation is used to find the eigenfrequencies of the structures, and these are in good agreement with the measured frequency response.

  • 18.
    Palmer, Kristoffer
    et al.
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrostrukturteknik.
    Lotfi, Sara
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrostrukturteknik.
    Kratz, Henrik
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrostrukturteknik.
    Thornell, Greger
    Uppsala universitet, Teknisk-naturvetenskapliga vetenskapsområdet, Tekniska sektionen, Institutionen för teknikvetenskaper, Mikrostrukturteknik.
    A micromachined dual-axis actuator for Use in a miniaturized optical communication system2008Inngår i: Proceeding of the International Astronautical Congress, Sep 29 - Oct 3, Glasgow, Scotland, 2008Konferansepaper (Fagfellevurdert)
    Abstract [en]

    A micromachined beam-steering device for use in a miniaturized free-space optical communication system is presented. This device is part of a communication system intended for microspacecraft flying in kilometer-sized formations. Central to it, is a laser-reflecting mirror tiltable in two orthogonal directions using electrothermal actuators based on heating of a polymer confined in silicon v-grooves. The device is fabricated using standard microstructure technology. Successful experiments show a maximum mechanical scan range of 19º in two orthogonal directions. The voltages applied are below 100 V, and the power consumption is less than 2.4 W. Thermal coupling between orthogonal joints has been investigated with infrared imaging. The overall results are very promising, and improvement in the design and fabrication can be suggested.

1 - 18 of 18
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