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The integration of single-layer graphene with diamond substrates offers a promising platform for highperformance electronic devices by utilizing the exceptional properties of both materials. This study describes a fabrication process and transport measurements of single-layer graphene devices on diamond substrates featuring two surface terminations: hydrogen (H-terminated, thermal process) and oxygen (O-terminated, plasma treatment). The carrier transport properties were investigated using Hall effect measurements over a broad temperature range (80-400 K) under high-vacuum conditions (1 x 10^-4 mbar). Our findings reveal that thermal annealing significantly improves the graphene-diamond interface quality, causing a notable increase in carrier mobility for devices on both H- and O-terminated from 1439 to 1644 cm²/Vs and from 1238 to 1340 cm²/Vs, respectively. We also found that the effect of remote interfacial phonon scattering on high-temperature mobility is affected by the termination type. These findings highlight the importance of substrate surface engineering and offer a pathway for optimizing graphene-diamond heterostructures for advanced electronic applications.

The high current-carrying capacity of graphene is essential for its use as an interconnect in electronic and spintronic circuits. At the same time, knowing the breakdown limits and mechanism under high fields can enable new device design strategies. In this work, we push the current carrying capacity of the scalable form of chemical vapor deposited (CVD) graphene employing a high-thermal conducting single crystalline diamond substrate. Our experiments on CVD graphene reveal extremely high current densities > 10⁹ A/cm² in graphene on the diamond with both ohmic (low-resistive) and tunneling tunnel (high-resistive) contacts. Measurements on ferromagnetic (TiO_x/Co) and metallic (Ti/Au) contacts demonstrate current densities of ∼1.16×10⁹ A/cm² and ∼1.7×10⁹ A/cm², respectively. The tunnel (high-resistive) contacts exhibit a shunting of graphene under high currents via the bottom graphitized diamond, resulting in dielectric breakdown and via alternative conducting paths. Electrical measurements show a distinct threshold for conducting paths of graphitized diamond, in tune accordance with Middleton-Wingreen's theory. Our results of high current densities achieved in CVD graphene, with distinct dependence on ohmic and tunneling, contact resistance, and the observed breakdown mechanism, provide new insights for enabling high-current all carbon circuits.

Graphene on diamond has emerged as a promising platform for various electronic applications. This brief review article explores the recent advancements and the potential of graphene on diamond for electronic applications with a focus on single-crystal (SC) chemically vapor-deposited and high-pressure and high-temperature diamond. Device fabrication techniques, properties, and performance of single-layer graphene on diamond in various electronic devices are discussed. This hybrid system's challenges and prospects are also analyzed. A particular emphasis is placed on the unique benefits of diamond as a substrate for graphene and its growth, including its high thermal conductivity, mechanical strength, high optical phonon energy, and the importance of achieving high-quality single-layer graphene on SC diamond.